{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,10]],"date-time":"2026-02-10T07:27:59Z","timestamp":1770708479408,"version":"3.49.0"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Basic Research Program of China","doi-asserted-by":"publisher","award":["2017YFA0207600"],"award-info":[{"award-number":["2017YFA0207600"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61832007"],"award-info":[{"award-number":["61832007"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61622403"],"award-info":[{"award-number":["61622403"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61621091"],"award-info":[{"award-number":["61621091"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Beijing National Research Center for Information Science and Technology"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2020,7]]},"DOI":"10.1109\/tcad.2019.2917852","type":"journal-article","created":{"date-parts":[[2019,5,25]],"date-time":"2019-05-25T04:10:17Z","timestamp":1558757417000},"page":"1414-1427","source":"Crossref","is-referenced-by-count":55,"title":["Low Bit-Width Convolutional Neural Network on RRAM"],"prefix":"10.1109","volume":"39","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8264-3357","authenticated-orcid":false,"given":"Yi","family":"Cai","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8255-985X","authenticated-orcid":false,"given":"Tianqi","family":"Tang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7731-7028","authenticated-orcid":false,"given":"Lixue","family":"Xia","sequence":"additional","affiliation":[]},{"given":"Boxun","family":"Li","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6108-5157","authenticated-orcid":false,"given":"Yu","family":"Wang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2421-353X","authenticated-orcid":false,"given":"Huazhong","family":"Yang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","first-page":"200","article-title":"A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability","author":"sheu","year":"2011","journal-title":"Proc ISSCC"},{"key":"ref38","first-page":"64","article-title":"Comparative study of CMOS op-amp in 45nm and 180 nm technology","volume":"4","author":"siddharth","year":"2014","journal-title":"Int J Eng Res Appl"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617410"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665746"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056056"},{"key":"ref30","article-title":"Learning multiple layers of features from tiny images","author":"krizhevsky","year":"2009"},{"key":"ref37","first-page":"1135","article-title":"Learning both weights and connections for efficient neural network","author":"han","year":"2015","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref36","first-page":"100","article-title":"A new approach to design low power CMOS flash A\/D converter","volume":"2","author":"chauhan","year":"2011","journal-title":"International Journal of VLSI Design & Communication Systems"},{"key":"ref35","first-page":"66","article-title":"A 10b 600MS\/s multi-mode CMOS DAC for multiple Nyquist zone operation","author":"chen","year":"2011","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref34","first-page":"177","article-title":"Simulation and analysis of sense amplifier in submicron technology","volume":"2","author":"gupta","year":"2014","journal-title":"Int J Eng Tech Res"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744870"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898101"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/23\/7\/075201"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2015.04.025"},{"key":"ref15","first-page":"4107","article-title":"Binarized neural networks","author":"hubara","year":"2016","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_32"},{"key":"ref17","article-title":"Incremental network quantization: Towards lossless CNNs with low-precision weights","author":"zhou","year":"2017","journal-title":"Proc Int Conf Learn Represent (ICLR)"},{"key":"ref18","article-title":"DoReFa-Net: Training low bitwidth convolutional neural networks with low bitwidth gradients","author":"zhou","year":"2016","journal-title":"arXiv preprint arXiv 1606 06160"},{"key":"ref19","first-page":"238","article-title":"A \n$280\\mu\\text{w}$\n dynamic-zoom ADC with 120dB DR and 118dB SNDR in 1kHz BW","author":"karmakar","year":"2018","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref28","first-page":"53","article-title":"Comparison of learning algorithms for handwritten digit recognition","volume":"60","author":"lecun","year":"1995","journal-title":"Proc Int Conf Artif Neural Netw"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2015.7298932"},{"key":"ref6","first-page":"73","article-title":"DaDianNao: A neural network supercomputer","volume":"66","author":"tao","year":"2016","journal-title":"IEEE Trans Comput"},{"key":"ref29","volume":"2","author":"lecun","year":"2010","journal-title":"MNIST Handwritten Digit Database"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2644865.2541967"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"144","DOI":"10.1038\/530144a","article-title":"The chips are down for Moore’s law","volume":"530","author":"waldrop","year":"2016","journal-title":"National News"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"1610","DOI":"10.1109\/TNN.2010.2066286","article-title":"Human tracking using convolutional neural networks","volume":"21","author":"fan","year":"2010","journal-title":"IEEE Trans Neural Netw"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.55"},{"key":"ref1","article-title":"Very deep convolutional networks for large-scale image recognition","author":"simonyan","year":"2015","journal-title":"Proc Int Conf Learn Represent (ICLR)"},{"key":"ref46","first-page":"1097","article-title":"ImageNet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref20","first-page":"232","article-title":"A 15.2-ENOB continuous-time \n$\\delta\\sigma$\n ADC for a \n$7.3~\\mu\\text{W}$\n 200mvpp-linear-input-range neural recording front-end","author":"chandrakumar","year":"2018","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref45","year":"2018","journal-title":"GTC Talk—8-Bit Inference With TensorRT"},{"key":"ref22","first-page":"230","article-title":"A 50MHZ-BW continuous-time \n$\\delta\\sigma$\n ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR","author":"he","year":"2018","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref47","first-page":"2074","article-title":"Learning structured sparsity in deep neural networks","author":"wen","year":"2016","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2871081"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479018"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310332"},{"key":"ref41","first-page":"1009","article-title":"MNSIM: Simulation platform for memristor-based neuromorphic computing system","volume":"37","author":"xia","year":"2018","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref23","first-page":"288","article-title":"50nW 5kHz-BW opamp-less \n$\\delta\\sigma$\n impedance analyzer for brain neurochemistry monitoring","author":"el ansary","year":"2018","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7926952"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/92.784091"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2018.2831698"},{"key":"ref25","first-page":"20.3.1","article-title":"Understanding of the endurance failure in scaled HFO2-based 1T1R RRAM through vacancy mobility degradation","author":"chen","year":"2012","journal-title":"Proc IEEE Int Electron Devices Meeting (IEDM)"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9119884\/08718353.pdf?arnumber=8718353","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T14:03:24Z","timestamp":1651068204000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8718353\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7]]},"references-count":47,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2019.2917852","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,7]]}}}