{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T23:54:24Z","timestamp":1769298864293,"version":"3.49.0"},"reference-count":51,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100008504","name":"Cockrell School of Engineering and by the NASCENT Center\u2019s Nanoengineering Online Education Program at the University of Texas at Austin","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008504","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2020,12]]},"DOI":"10.1109\/tcad.2020.2982621","type":"journal-article","created":{"date-parts":[[2020,3,24]],"date-time":"2020-03-24T02:29:48Z","timestamp":1585016988000},"page":"4760-4776","source":"Crossref","is-referenced-by-count":7,"title":["M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs"],"prefix":"10.1109","volume":"39","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3078-9498","authenticated-orcid":false,"given":"Aseem","family":"Sayal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Paras","family":"Ajay","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mark W.","family":"McDermott","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S. V.","family":"Sreenivasan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0258-6776","authenticated-orcid":false,"given":"Jaydeep P.","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","year":"2005","journal-title":"International Workshop on Logic Synthesis (IWLS) Benchmarks 2005"},{"key":"ref38","year":"2020","journal-title":"Texas advanced computing center"},{"key":"ref33","year":"2020","journal-title":"Etcher ICP Deep Silicon PlasmaTherm Versaline"},{"key":"ref32","year":"2020","journal-title":"Photolithography i-g Line Mask Aligner SussMicrotec—MA6\/BA6"},{"key":"ref31","year":"2020","journal-title":"Nova Electronic Materials LLC"},{"key":"ref30","year":"2020","journal-title":"UNIBOND Wafers Smart Cut Technology"},{"key":"ref37","year":"2020","journal-title":"OpenFOAM foundation"},{"key":"ref36","article-title":"Atmospheric reentry modelling using an open source DSMC code","author":"palharini","year":"2014"},{"key":"ref35","year":"2020","journal-title":"ANSYS Fluent-CFD Software"},{"key":"ref34","year":"2020","journal-title":"Microelectronics Research Center (MRC)"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2106852"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1982.1585498"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2043573"},{"key":"ref2","author":"mosher","year":"2004","journal-title":"Structured ASIC Based SoC Design"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4612-0531-9_4"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1080\/03155986.1983.11731889"},{"key":"ref22","first-page":"91","article-title":"Refining initial points for K-Means clustering","author":"bradley","year":"1998","journal-title":"Proc 15th Int Conf Mach Learn"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1002\/net.3230220504"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.892339"},{"key":"ref23","year":"2015","journal-title":"Post-Mask ECO Using Conformal ECO Conformal-ECO (CECO) Version 15 10-p100"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2729587"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2005.862174"},{"key":"ref50","year":"2009","journal-title":"ISE Design Suite Software Manuals Product Specification UG681 (v 11 4)"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1117\/12.2299644"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1117\/12.2514924"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681422"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1149\/1.3577596"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"122","DOI":"10.1109\/TMECH.2013.2297679","article-title":"Nanoscale magnification and shape control system for precision overlay in jet and flash imprint lithography","volume":"20","author":"anshuman","year":"2015","journal-title":"IEEE\/ASME Trans Mechatron"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1116\/1.4967371"},{"key":"ref15","article-title":"Interferometric-spatial-phase imaging for sub-nanometer three-dimensional positioning","author":"moon","year":"2004"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2013.6702315"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1149\/1.3187271"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2014.7274306"},{"key":"ref19","year":"2012","journal-title":"RTL Compiler-Physical Application Note Product Version RTL Compiler 11 2"},{"key":"ref4","article-title":"Automated alignment of fast- axis collimator lenses for high-power diode laser bars","volume":"8965","author":"westphalen","year":"2014","journal-title":"Proc SPIE"},{"key":"ref3","author":"santarini","year":"2003","journal-title":"Are structured ASICs a dead end for EDA?"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2010.04.042"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICRA.2013.6630754"},{"key":"ref8","article-title":"Nanoimprint system development and status for high volume semiconductor manufacturing","volume":"9423","author":"takeishi","year":"2015","journal-title":"Proc Altern Lithograph Technol VII"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1038\/micronano.2017.75"},{"key":"ref49","year":"2016","journal-title":"Vivado Design Suite Properties Reference Guide Product Specification UG912 (v2016 3)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1117\/3.601520"},{"key":"ref46","year":"2019","journal-title":"UltraScale Architecture and Product Data Sheet Overview Product Specification DS890 (v3 7)"},{"key":"ref45","year":"2015","journal-title":"Virtex-6 Family Overview Product Specification DS180 (V2 5)"},{"key":"ref48","year":"2017","journal-title":"PrimeTime-Golden Timing Signoff Solution and Environment"},{"key":"ref47","year":"2017","journal-title":"Innovus User Guide Product Version 16 22"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2717783"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2190478"},{"key":"ref44","year":"2014","journal-title":"Virtex-II Platform FPGAs Complete data sheet product specification DS031 (v3 4)"},{"key":"ref43","first-page":"12t","article-title":"A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 ?m2 SRAM cells, optimized for low power, high performance and high density SoC products","author":"jan","year":"2015","journal-title":"Proc Symp VLSI Circuits (VLSI Circuits)"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9265421\/09044426.pdf?arnumber=9044426","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T14:06:26Z","timestamp":1651068386000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9044426\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,12]]},"references-count":51,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2020.2982621","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,12]]}}}