{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T07:16:10Z","timestamp":1782976570306,"version":"3.54.5"},"reference-count":43,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,12,1]],"date-time":"2020-12-01T00:00:00Z","timestamp":1606780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000654","name":"Marie Curie Actions of the European Union\u2019s H2020 Programme","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000654","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2020,12]]},"DOI":"10.1109\/tcad.2020.2986320","type":"journal-article","created":{"date-parts":[[2020,4,8]],"date-time":"2020-04-08T17:25:23Z","timestamp":1586366723000},"page":"4385-4398","source":"Crossref","is-referenced-by-count":22,"title":["CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation"],"prefix":"10.1109","volume":"39","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0613-6844","authenticated-orcid":false,"given":"Amir Mahdi","family":"Hosseini Monazzah","sequence":"first","affiliation":[{"name":"School of Computer Engineering, Iran University of Science and Technology, Tehran, Iran"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Amir M.","family":"Rahmani","sequence":"additional","affiliation":[{"name":"School of Nursing, University of California at Irvine, Irvine, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3197-0723","authenticated-orcid":false,"given":"Antonio","family":"Miele","sequence":"additional","affiliation":[{"name":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nikil","family":"Dutt","sequence":"additional","affiliation":[{"name":"School of Nursing, University of California at Irvine, Irvine, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342113"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/CASES.2015.7324548"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687448"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333665"},{"key":"ref30","first-page":"1","article-title":"Robust face recognition under difficult lighting conditions","volume":"1","author":"ghatge","year":"2012","journal-title":"Int J Technol Explor Learn (IJTEL)"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342139"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2014.6880184"},{"key":"ref35","first-page":"73","article-title":"Evaluation of spin-hall-assisted STT-MRAM for cache replacement","author":"chang","year":"2016","journal-title":"Prof IEEE Int Symp Nanoscale Archit (NANOARCH)"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3084690"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2893356"},{"key":"ref40","first-page":"1","article-title":"Resilience-driven STT-RAM cache architecture for approximate computing","author":"shafique","year":"2015","journal-title":"Workshop on Approximate Computing (AC)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2015.2393860"},{"key":"ref12","first-page":"50","article-title":"Doppelg&#x00E4;nger: A cache for approximate computing","author":"miguel","year":"2015","journal-title":"Proc Int Symp Microarch (MICRO)"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2503733"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2017.7968217"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744799"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927016"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2017.8009198"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1142\/S2010324712400073"},{"key":"ref19","first-page":"1313","article-title":"Asymmetry of MTJ switching and its implication to STT-RAM designs","author":"zhang","year":"2012","journal-title":"Proc Design and Test in Eur (DATE) Conf"},{"key":"ref28","article-title":"Accept: A programmer-guided compiler framework for practical approximate computing","author":"sampson","year":"2015"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.100.057206"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2509136.2509546"},{"key":"ref3","year":"2019","journal-title":"Emerging Research Devices Focus Teams Presentations Beyond CMOS"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1973009.1973030"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993518"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429401"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2628742"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1049\/el.2013.2319"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2875439"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488873"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2011.942068"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2015.7338407"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2011.2159262"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2198825"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2016.7479181"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/2644808"},{"key":"ref23","article-title":"Precessional spin-transfer switching in a magnetic tunnel junction with a synthetic antiferromagnetic perpendicular polarizer","volume":"111","author":"de castro","year":"2012","journal-title":"J Appl Phys"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950391"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2640296"},{"key":"ref25","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2024716.2024718","article-title":"The gem5 simulator","volume":"39","author":"binkert","year":"2011","journal-title":"ACM SIGARCH Comput Architect News"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9265421\/09060907.pdf?arnumber=9060907","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,27]],"date-time":"2026-01-27T05:51:21Z","timestamp":1769493081000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9060907\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,12]]},"references-count":43,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2020.2986320","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,12]]}}}