{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,28]],"date-time":"2026-02-28T19:02:45Z","timestamp":1772305365659,"version":"3.50.1"},"reference-count":50,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,8,1]],"date-time":"2021-08-01T00:00:00Z","timestamp":1627776000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-1718883"],"award-info":[{"award-number":["CCF-1718883"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000185","name":"DARPA","doi-asserted-by":"publisher","award":["FA-650-18-2-7843"],"award-info":[{"award-number":["FA-650-18-2-7843"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2021,8]]},"DOI":"10.1109\/tcad.2020.3025075","type":"journal-article","created":{"date-parts":[[2020,9,18]],"date-time":"2020-09-18T20:21:35Z","timestamp":1600460495000},"page":"1687-1700","source":"Crossref","is-referenced-by-count":25,"title":["Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale"],"prefix":"10.1109","volume":"40","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9768-3378","authenticated-orcid":false,"given":"Tsung-Wei","family":"Huang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0977-2774","authenticated-orcid":false,"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Chun-Xun","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Guannan","family":"Guo","sequence":"additional","affiliation":[]},{"given":"Martin D. F.","family":"Wong","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1177\/1094342007078442"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/2676870.2676883"},{"key":"ref33","year":"2020","journal-title":"Eigen"},{"key":"ref32","year":"2020","journal-title":"TensorFlow™"},{"key":"ref31","year":"2020","journal-title":"The mnist"},{"key":"ref30","first-page":"216","article-title":"The ISPD2005 placement contest and benchmark suite","author":"nam","year":"2005","journal-title":"Proc Int Symp Phys Design"},{"key":"ref37","year":"2020","journal-title":"Nanos++"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTR.2008.4663765"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1142\/S0129626411000151"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.1996.0107"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2312005.2312058"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923063"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593177"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2012.2237140"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2019.00105"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317803"},{"key":"ref22","year":"2020","journal-title":"SLOCCount"},{"key":"ref21","year":"2020","journal-title":"Intel Developer Zone"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3007319"},{"key":"ref23","year":"2020","journal-title":"LizardTech"},{"key":"ref26","first-page":"48","article-title":"An efficient and effective detailed placement algorithm","author":"pan","year":"2005","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/22899.22906"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834422"},{"key":"ref10","author":"bhasker","year":"2009","journal-title":"Static Timing Analysis for Nanometer Designs A Practical Approach"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372664"},{"key":"ref40","first-page":"519","article-title":"X10: An object-oriented approach to non-uniform cluster computing","author":"charles","year":"2005","journal-title":"Proc 20th Annu ACM SIGPLAN Conf Object Orient Program Syst Lang Appl (OOPSLA)"},{"key":"ref12","year":"2020","journal-title":"OpenSTA Parallax Inc"},{"key":"ref13","year":"2015","journal-title":"OpenMP 4 5"},{"key":"ref14","year":"2020","journal-title":"Intel TBB"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"135","DOI":"10.1145\/2517327.2442530","article-title":"Ligra: A lightweight graph processing framework for shared memory","volume":"48","author":"shun","year":"2013","journal-title":"ACM SIGPLAN Notices"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2517349.2522739"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2019.8916447"},{"key":"ref18","first-page":"119","article-title":"Thread scheduling for multiprogrammed multiprocessors","author":"arora","year":"1998","journal-title":"Proc 10th Annu ACM Symp Parallel Algorithms Archit (SPAA)"},{"key":"ref19","year":"2020","journal-title":"OpenTimer"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-67295-3_2"},{"key":"ref3","first-page":"1","article-title":"A general-purpose parallel and heterogeneous task programming system for VLSI CAD","author":"huang","year":"2020","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-018-2238-4"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2018.02.022"},{"key":"ref8","year":"2020","journal-title":"Cpp-Taskflow"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.24251\/HICSS.2017.750"},{"key":"ref49","first-page":"1","article-title":"A novel inference algorithm for large sparse neural network using task graph parallelism","author":"lin","year":"2020","journal-title":"Proc IEEE High Perform Extreme Comput Conf (HPEC)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372666"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2007.370484"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2013.98"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218750"},{"key":"ref47","first-page":"46","article-title":"GPU-accelerated static timing analysis","author":"guo","year":"2020","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref42","article-title":"Legion: Programming distributed heterogeneous architectures with logical regions","author":"bauer","year":"2014"},{"key":"ref41","first-page":"91","article-title":"Charm++: A portable concurrent object oriented system based on C++","author":"kale","year":"1993","journal-title":"Proc 8th Annu ACM SIGPLAN Conf Object Orient Program Syst Lang Appl (OOPSLA)"},{"key":"ref44","first-page":"1","article-title":"Harnessing clusters of hybrid nodes with a sequential task-based programming model","author":"agullo","year":"2014","journal-title":"Proc Int Workshop Parallel Matrix Algorithms Appl (PMAA)"},{"key":"ref43","article-title":"Dynamic task execution on shared and distributed memory architectures","author":"yarkhan","year":"2012"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/9488253\/9200667-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9488253\/09200667.pdf?arnumber=9200667","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:49:30Z","timestamp":1652194170000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9200667\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,8]]},"references-count":50,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2020.3025075","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,8]]}}}