{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,14]],"date-time":"2026-02-14T06:04:31Z","timestamp":1771049071176,"version":"3.50.1"},"reference-count":48,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,1]],"date-time":"2022-05-01T00:00:00Z","timestamp":1651363200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,5]]},"DOI":"10.1109\/tcad.2021.3082495","type":"journal-article","created":{"date-parts":[[2021,5,21]],"date-time":"2021-05-21T15:38:01Z","timestamp":1621611481000},"page":"1509-1522","source":"Crossref","is-referenced-by-count":19,"title":["Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7944-7101","authenticated-orcid":false,"given":"Behnaz","family":"Ranjbar","sequence":"first","affiliation":[{"name":"Chair for Processor Design, CFAED, Technische Universität Dresden, Dresden, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5280-994X","authenticated-orcid":false,"given":"Ali","family":"Hosseinghorban","sequence":"additional","affiliation":[{"name":"Chair for Processor Design, CFAED, Technische Universität Dresden, Dresden, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6675-7231","authenticated-orcid":false,"given":"Mohammad","family":"Salehi","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, University of Guilan, Rasht, Iran"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5661-3629","authenticated-orcid":false,"given":"Alireza","family":"Ejlali","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering, Sharif University of Technology, Tehran, Iran"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7125-1737","authenticated-orcid":false,"given":"Akash","family":"Kumar","sequence":"additional","affiliation":[{"name":"Chair for Processor Design, CFAED, Technische Universität Dresden, Dresden, Germany"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3131347"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.3031039"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2021.3072286"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2016.2594790"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3033374"},{"key":"ref6","first-page":"7","article-title":"Multicore operating-system support for mixed criticality","volume-title":"Proc. Workshop Mixed Criticality Roadmap Evolving UAV Certification","volume":"4","author":"Anderson"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2013.131"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/PADSW.2014.7097809"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SOCDC.2010.5682930"},{"key":"ref10","volume-title":"Fault-Tolerant Systems","author":"Koren","year":"2020"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea11010007"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2656045.2656057"},{"key":"ref13","first-page":"3","article-title":"Empirical study of energy minimization issues for mixed-criticality systems with reliability constraint","volume-title":"Proc. 1st Workshop Low-Power Dependable Comput. (LPDC)","author":"Li"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/CIT\/IUCC\/DASC\/PICOM.2015.63"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2016.7461336"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TSUSC.2018.2801123"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/SIES.2016.7509413"},{"key":"ref18","article-title":"Compiler-directed dynamic voltage and frequency scaling for CPU power and energy reduction","author":"Hsu","year":"2003"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2016.030"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3105921"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876103"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342210"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISORC.2015.18"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-019-09329-9"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-60588-3_14"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2016.7461340"},{"key":"ref27","first-page":"1","article-title":"Improving the schedulability and quality of service for federated scheduling of parallel mixed-criticality tasks on multiprocessors","volume-title":"Proc. Euromicro Conf. Real-Time Syst. (ECRTS)","volume":"106","author":"Pathan"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2018.00042"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3275154"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.226"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2018.2858816"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126619500294"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2019.00084"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/RSP.2012.6380704"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2013.06.016"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2544375.2544392"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2015.2444402"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ESTMED.2010.5666982"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-0676-1"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3082495"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.18"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3398665"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484791"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2512839"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/3139258.3139268"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852657"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2017.2695958"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2007.158"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9760497\/09438663.pdf?arnumber=9438663","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,9]],"date-time":"2024-01-09T23:37:34Z","timestamp":1704843454000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9438663\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5]]},"references-count":48,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2021.3082495","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,5]]}}}