{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:00:46Z","timestamp":1740132046983,"version":"3.37.3"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology (MOST) of Taiwan","doi-asserted-by":"publisher","award":["MOST-109-2224-E-007-006"],"award-info":[{"award-number":["MOST-109-2224-E-007-006"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,7]]},"DOI":"10.1109\/tcad.2021.3102893","type":"journal-article","created":{"date-parts":[[2021,8,6]],"date-time":"2021-08-06T20:15:47Z","timestamp":1628280947000},"page":"2337-2347","source":"Crossref","is-referenced-by-count":1,"title":["Tiny Phase-Error Monitor for Fault and Soft-Error-Tolerant DLL to Support Graceful Degradation and Module-Level Testing"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3649-8248","authenticated-orcid":false,"given":"Jun-Yu","family":"Yang","sequence":"first","affiliation":[{"name":"Electrical Engineering Department, National Tsing Hua University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3721-987X","authenticated-orcid":false,"given":"Shi-Yu","family":"Huang","sequence":"additional","affiliation":[{"name":"Electrical Engineering Department, National Tsing Hua University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"volume-title":"Self-Checking and Fault-Tolerant Digital Design","year":"2000","author":"Lala","key":"ref1"},{"volume-title":"Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories","year":"2002","author":"Chakraborty","key":"ref2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2715803"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1147\/rd.62.0200"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2010.19"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2018.8400694"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS49688.2020.9301553"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2960207"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2496312"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050431"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.83"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.38"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2004.1347920"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.59"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2009.2024699"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2161353"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2019.2956971"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1049\/el:20010160"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.826333"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2006.258161"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2248070"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2019.2930775"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3092683"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCDCS.2004.1393380"},{"volume-title":"CIC Reference Flow for Cell-Based IC Design","year":"2008","key":"ref25"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9799721\/09508436.pdf?arnumber=9508436","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,11]],"date-time":"2024-01-11T23:41:56Z","timestamp":1705016516000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9508436\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,7]]},"references-count":25,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2021.3102893","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2022,7]]}}}