{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T16:32:45Z","timestamp":1781886765476,"version":"3.54.5"},"reference-count":53,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2022,10,1]],"date-time":"2022-10-01T00:00:00Z","timestamp":1664582400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"},{"start":{"date-parts":[[2022,10,1]],"date-time":"2022-10-01T00:00:00Z","timestamp":1664582400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,10]]},"DOI":"10.1109\/tcad.2021.3124757","type":"journal-article","created":{"date-parts":[[2021,11,2]],"date-time":"2021-11-02T21:34:28Z","timestamp":1635888868000},"page":"3188-3201","source":"Crossref","is-referenced-by-count":18,"title":["Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4743-6461","authenticated-orcid":false,"given":"Sujan K.","family":"Gonugondla","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Illinois at Urbana–Champaign, Urbana, IL, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5641-0541","authenticated-orcid":false,"given":"Charbel","family":"Sakr","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana–Champaign, Urbana, IL, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hassan","family":"Dbouk","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Illinois at Urbana–Champaign, Urbana, IL, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4323-9164","authenticated-orcid":false,"given":"Naresh R.","family":"Shanbhag","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Illinois at Urbana–Champaign, Urbana, IL, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2014.6855225"},{"key":"ref2","volume-title":"Compute memory","author":"Shanbhag","year":"2017"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-35971-3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2922889"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2782087"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510687"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310397"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2867275"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC48029.2020.9075923"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310401"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502421"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778160"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062985"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062949"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062995"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2929245"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2981901"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2928043"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2984161"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2971642"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3027801"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2907488"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3005783"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2940649"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2897497"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2706299"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3058510"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2960841"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2981901"},{"key":"ref31","first-page":"1","article-title":"Fundamental limits on the precision of in-memory architectures","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Gonugondla"},{"key":"ref32","article-title":"Fundamental limits on energy-delay-accuracy of in-memory architectures in inference applications","author":"Gonugondla","year":"2020","journal-title":"arXiv:2012.13645"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/78.678521"},{"key":"ref34","first-page":"1737","article-title":"Deep learning with limited numerical precision","volume-title":"Proc. Int. Conf. Mach. Learn.","author":"Gupta"},{"key":"ref35","first-page":"3007","article-title":"Analytical guarantees on numerical precision of deep neural networks","volume-title":"Proc. Int. Conf. Mach. Learn.","author":"Sakr"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2018.8461702"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317770"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2963616"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662392"},{"key":"ref40","article-title":"A microprocessor implemented in 65nm CMOS with configurable and bit-scalable accelerator for programmable in-memory computing","author":"Jia","year":"2018","journal-title":"arXiv:1811.04047"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778187"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778028"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062958"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2992886"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2015.7178127"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2332264"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052859"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2016.7844125"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3020286"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310398"},{"key":"ref51","volume-title":"ADC Performance Survey 1997\u20132019","author":"Murmann","year":"2019"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672032"},{"key":"ref53","volume-title":"ITRS roadmap tables","year":"2015"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/9895338\/9598887-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9895338\/09598887.pdf?arnumber=9598887","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,12]],"date-time":"2024-01-12T01:54:55Z","timestamp":1705024495000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9598887\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10]]},"references-count":53,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2021.3124757","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,10]]}}}