{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,8]],"date-time":"2026-05-08T16:14:58Z","timestamp":1778256898167,"version":"3.51.4"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,11,1]],"date-time":"2022-11-01T00:00:00Z","timestamp":1667260800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,11]]},"DOI":"10.1109\/tcad.2021.3134886","type":"journal-article","created":{"date-parts":[[2021,12,13]],"date-time":"2021-12-13T21:00:20Z","timestamp":1639429220000},"page":"4837-4850","source":"Crossref","is-referenced-by-count":10,"title":["Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5647-0584","authenticated-orcid":false,"given":"Valeriy","family":"Sukharev","sequence":"first","affiliation":[{"name":"Design-to-Silicon Division, Siemens EDA, Fremont, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8743-0155","authenticated-orcid":false,"given":"Armen","family":"Kteyan","sequence":"additional","affiliation":[{"name":"Design-to-Silicon Division, Siemens EDA, Yerevan, Armenia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5393-7794","authenticated-orcid":false,"given":"Farid N.","family":"Najm","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering Department, University of Toronto, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yong Hyeon","family":"Yi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4194-1347","authenticated-orcid":false,"given":"Chris H.","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jun-Ho","family":"Choy","sequence":"additional","affiliation":[{"name":"Design-to-Silicon Division, Siemens EDA, Fremont, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sofya","family":"Torosyan","sequence":"additional","affiliation":[{"name":"Design-to-Silicon Division, Siemens EDA, Yerevan, Armenia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Zhu","sequence":"additional","affiliation":[{"name":"Design-to-Silicon Division, Siemens EDA, Fremont, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1063\/1.100113"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1063\/1.1330547"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2013.08.013"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2018.2874244"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2524540"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2666723"},{"key":"ref7","first-page":"1","article-title":"Efficient simulation of electromigration damage in large chip power grids using accurate physical models","volume-title":"Proc. IRPS","author":"Najm"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1116\/6.0000617"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2019.2956158"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112683"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1063\/1.371169"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1063\/1.2775538"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1088\/0965-0393\/15\/8\/008"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2021.111585"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2017.7936343"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1063\/1.354073"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1063\/1.1821631"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1063\/1.366464"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1063\/1.4926794"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2015.2508447"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/B0-08-043749-4\/08125-8"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1063\/1.4799484"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAPT.2005.859737"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1063\/1.370990"},{"key":"ref25","volume-title":"mPower Power Integrity Analysis","year":"2021"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1063\/1.1658379"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/s0022-5096(02)00019-4"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1063\/1.42691"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/S0065-2156(08)70387-9"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1115\/1.4036402"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9928799\/09646993.pdf?arnumber=9646993","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T21:17:43Z","timestamp":1709327863000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9646993\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,11]]},"references-count":30,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2021.3134886","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,11]]}}}