{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,26]],"date-time":"2026-06-26T14:07:43Z","timestamp":1782482863949,"version":"3.54.5"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000196","name":"Canada Foundation for Innovation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000196","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100014646","name":"Provincial Government of Newfoundland and Labrador","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100014646","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100005616","name":"Memorial University of Newfoundland","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100005616","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,12]]},"DOI":"10.1109\/tcad.2022.3153437","type":"journal-article","created":{"date-parts":[[2022,2,23]],"date-time":"2022-02-23T20:33:32Z","timestamp":1645648412000},"page":"5138-5151","source":"Crossref","is-referenced-by-count":53,"title":["Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4902-353X","authenticated-orcid":false,"given":"Zhenxin","family":"Zhao","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Faculty of Engineering and Applied Science, Memorial University of Newfoundland, St. John’s, NL, Canada"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2946-8072","authenticated-orcid":false,"given":"Lihong","family":"Zhang","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Faculty of Engineering and Applied Science, Memorial University of Newfoundland, St. John’s, NL, Canada"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","first-page":"1","article-title":"Layout-dependent effects aware gm\/ID-based many-objective sizing optimization for analog integrated circuits","author":"liao","year":"2018","journal-title":"Proc IEEE Int Symp Circuits Syst (ISCAS)"},{"key":"ref32","first-page":"481i","article-title":"Analog module placement realizing symmetry constraints based on a radiation decoder","author":"zhang","year":"2004","journal-title":"Proc IEEE Int Midwest Symp Circuits Syst"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2017.2743240"},{"key":"ref30","author":"sutton","year":"2018","journal-title":"Reinforcement Learning An Introduction"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6271714"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.895756"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351560"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.44506"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/43.945301"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.10.017"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2006.886801"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2010.2093581"},{"key":"ref17","first-page":"549","article-title":"Evolutionary synthesis of cube root computational circuit using graph hybrid estimation of distribution algorithm","volume":"23","author":"slezak","year":"2014","journal-title":"Radioengineering"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.engappai.2019.01.012"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2376987"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218757"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3025068"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116200"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572399"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2012.90"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401562"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2661804"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2729461"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2256436"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2010.09.003"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2768826"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3107404"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702574"},{"key":"ref22","first-page":"1","article-title":"Novel circuit topology synthesis method using circuit feature mining and symbolic comparison","author":"ferent","year":"2014","journal-title":"Proc Des Autom Test Eur Conf Exhibit"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2977605"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2418287"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2234826"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9181149"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2783344"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9956950\/09718525.pdf?arnumber=9718525","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,12]],"date-time":"2022-12-12T19:42:34Z","timestamp":1670874154000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9718525\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12]]},"references-count":34,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3153437","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,12]]}}}