{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,10]],"date-time":"2026-06-10T22:45:08Z","timestamp":1781131508128,"version":"3.54.1"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62004011"],"award-info":[{"award-number":["62004011"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"State Key Laboratory of Computer Architecture","award":["CARCH201917"],"award-info":[{"award-number":["CARCH201917"]}]},{"DOI":"10.13039\/501100001809","name":"Joint Funds of the National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["U20A20204"],"award-info":[{"award-number":["U20A20204"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62072019"],"award-info":[{"award-number":["62072019"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2022,12]]},"DOI":"10.1109\/tcad.2022.3163628","type":"journal-article","created":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T19:53:39Z","timestamp":1648670019000},"page":"5333-5342","source":"Crossref","is-referenced-by-count":14,"title":["Accelerating Graph-Connected Component Computation With Emerging Processing-In-Memory Architecture"],"prefix":"10.1109","volume":"41","author":[{"given":"Xuhang","family":"Chen","sequence":"first","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0080-4730","authenticated-orcid":false,"given":"Xueyan","family":"Wang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2207-6092","authenticated-orcid":false,"given":"Xiaotao","family":"Jia","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8424-7040","authenticated-orcid":false,"given":"Jianlei","family":"Yang","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, BDBC, State Key Laboratory of Software Development Environment (NLSDE), Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6759-8949","authenticated-orcid":false,"given":"Gang","family":"Qu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Maryland at College Park, College Park, MD, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Weisheng","family":"Zhao","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","first-page":"599","article-title":"{GraphX}: Graph processing in a distributed dataflow framework","author":"gonzalez","year":"2014","journal-title":"Proc of USENIX Symp on Operating Systems Design and Implementation (OSDI)"},{"key":"ref32","author":"leskovec","year":"2014","journal-title":"SNAP Datasets Stanford large network dataset collection"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2821565"},{"key":"ref10","first-page":"542","article-title":"GFlink: An in-memory computing architecture on heterogeneous CPU-GPU clusters for big data","author":"cen","year":"2016","journal-title":"Proc Int Conf Parallel Process"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2021.3084997"},{"key":"ref12","author":"wang","year":"2015","journal-title":"General structure for computational random access memory (cram)"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527186"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.54"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2776954"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218660"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/INTMAG.2017.8008048"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s42514-020-00038-5"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3397513"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/s11432-020-3219-6"},{"key":"ref4","article-title":"Bandwidth minimization problem","author":"wang","year":"2014","journal-title":"Proc 10ème Conférence Francophone de Modélisation Optim et Simul (MOSIM)"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001163"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TKDE.2014.2320716"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1371\/journal.pone.0229936"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-018-03140-z"},{"key":"ref5","author":"dinneen","year":"2012","journal-title":"Using Opencl for Implementing Simple Parallel Graph Algorithms"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2018.2799216"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/35021BIGCOMP.2015.7072830"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DCC.2016.14"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2013.6718818"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/0022-0000(85)90014-5"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00052"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/0020-0190(85)90083-3"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2016.7577360"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2016.35"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783759"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2019.00028"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/9956950\/09745146.pdf?arnumber=9745146","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,28]],"date-time":"2025-02-28T18:47:04Z","timestamp":1740768424000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9745146\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,12]]},"references-count":33,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3163628","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,12]]}}}