{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T01:44:40Z","timestamp":1769910280696,"version":"3.49.0"},"reference-count":60,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2023,3,1]],"date-time":"2023-03-01T00:00:00Z","timestamp":1677628800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,3,1]],"date-time":"2023-03-01T00:00:00Z","timestamp":1677628800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,3,1]],"date-time":"2023-03-01T00:00:00Z","timestamp":1677628800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001459","name":"Ministry of Education, Singapore, through Academic Research Fund Tier 2","doi-asserted-by":"publisher","award":["MOE2019-T2-1-071"],"award-info":[{"award-number":["MOE2019-T2-1-071"]}],"id":[{"id":"10.13039\/501100001459","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Tier 1","award":["MOE2019-T1-001-072"],"award-info":[{"award-number":["MOE2019-T1-001-072"]}]},{"DOI":"10.13039\/501100001475","name":"Nanyang Technological University, Singapore, through NAP","doi-asserted-by":"publisher","award":["M4082282"],"award-info":[{"award-number":["M4082282"]}],"id":[{"id":"10.13039\/501100001475","id-type":"DOI","asserted-by":"publisher"}]},{"name":"SUG","award":["M4082087"],"award-info":[{"award-number":["M4082087"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,3]]},"DOI":"10.1109\/tcad.2022.3184276","type":"journal-article","created":{"date-parts":[[2022,6,17]],"date-time":"2022-06-17T19:29:44Z","timestamp":1655494184000},"page":"781-794","source":"Crossref","is-referenced-by-count":8,"title":["FAT: An In-Memory Accelerator With Fast Addition for Ternary Weight Neural Networks"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2094-7643","authenticated-orcid":false,"given":"Shien","family":"Zhu","sequence":"first","affiliation":[{"name":"School of Computer Science and Engineering, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4731-1896","authenticated-orcid":false,"given":"Luan H. K.","family":"Duong","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1614-9929","authenticated-orcid":false,"given":"Hui","family":"Chen","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4365-2768","authenticated-orcid":false,"given":"Di","family":"Liu","sequence":"additional","affiliation":[{"name":"HP-NTU Digital Manufacturing Corporate Laboratory, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9348-4662","authenticated-orcid":false,"given":"Weichen","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Computer Science and Engineering, Nanyang Technological University, Singapore"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.01079"},{"key":"ref2","article-title":"Wav2vec 2.0: A framework for self-supervised learning of speech representations","volume-title":"Advances in Neural Information Processing Systems","volume":"33","author":"Baevski","year":"2020"},{"key":"ref3","first-page":"1","article-title":"DD-PPO: Learning near-perfect pointgoal navigators from 2.5 billion frames","volume-title":"Proc. Int. Conf. Learn. Represent. ICLR","author":"Wijmans"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_32"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2017.574"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CVPRW50498.2020.00357"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.00204"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v35i4.16462"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2019.00292"},{"key":"ref10","article-title":"Ultra-low precision 4-bit training of deep neural networks","volume-title":"Advances in Neural Information Processing Systems","volume":"33","author":"Sun","year":"2020"},{"key":"ref11","first-page":"1","article-title":"Trained ternary quantization","volume-title":"Proc. 5th Int. Conf. Learn. Represent.","author":"Zhu"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v34i04.5912"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v35i10.17036"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080254"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2910232"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/HCS49909.2020.9220622"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342277"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3064189"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3386263.3407588"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3295500.3356154"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS51385.2021.00016"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.2993045"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2963616"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2776954"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2019.8824948"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2020.3012550"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287644"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2907886"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715270"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH47378.2019.181297"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045166"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2018.00106"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2019.102868"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2928043"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2945617"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297384"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.3390\/ma14071624"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2018.8565811"},{"key":"ref41","first-page":"1","article-title":"Embedded STT-MRAM for mobile applications: Enabling advanced chip architectures","author":"Kang","year":"2010","journal-title":"Non-Volatile Memories Workshop"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2019.00044"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304041"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3357250"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9180665"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2909317"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/OJCAS.2020.3042550"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474022"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116495"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/CICC51472.2021.9431398"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401308"},{"key":"ref52","volume-title":"RISC-V Instruction Set Manual Volume I: User-Level ISA","year":"2019"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2939682"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702715"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001177"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358252"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1145\/3386263.3407580"},{"key":"ref58","volume-title":"NCSU FreePDK45","year":"2011"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1109\/MSE.2009.5270820"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2017.8053024"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10048562\/09799520.pdf?arnumber=9799520","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,1]],"date-time":"2024-02-01T05:10:46Z","timestamp":1706764246000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9799520\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,3]]},"references-count":60,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3184276","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,3]]}}}