{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T00:18:48Z","timestamp":1773793128455,"version":"3.50.1"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Dialog Semiconductor (Renasas) via A\u00d7A Project and Alex Chan\u2019s Studentship"},{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/N023641\/1"],"award-info":[{"award-number":["EP\/N023641\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,5]]},"DOI":"10.1109\/tcad.2022.3206732","type":"journal-article","created":{"date-parts":[[2022,9,14]],"date-time":"2022-09-14T15:34:52Z","timestamp":1663169692000},"page":"1560-1573","source":"Crossref","is-referenced-by-count":3,"title":["Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7617-1066","authenticated-orcid":false,"given":"Alex","family":"Chan","sequence":"first","affiliation":[{"name":"School of Engineering, Newcastle University, Newcastle upon Tyne, U.K"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4030-0089","authenticated-orcid":false,"given":"Danil","family":"Sokolov","sequence":"additional","affiliation":[{"name":"Dialog Semiconductor, Swindon, U.K"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6422-2006","authenticated-orcid":false,"given":"Victor","family":"Khomenko","sequence":"additional","affiliation":[{"name":"School of Engineering, Newcastle University, Newcastle upon Tyne, U.K"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Lloyd","sequence":"additional","affiliation":[{"name":"Dialog Semiconductor, Swindon, U.K"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0826-9330","authenticated-orcid":false,"given":"Alex","family":"Yakovlev","sequence":"additional","affiliation":[{"name":"School of Engineering, Newcastle University, Newcastle upon Tyne, U.K"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CSD.2004.1309112"},{"key":"ref12","first-page":"315","article-title":"Petrify: A tool for manipulating concurrent specifications and synthesis of asynchronous controllers","volume":"e80 d","author":"cortadella","year":"1997","journal-title":"IEICE Trans Inf Syst"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474117"},{"key":"ref14","year":"2006","journal-title":"Workcraft"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-06653-5_14"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/FDL56239.2022.9925657"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/5.24143"},{"key":"ref10","article-title":"Synthesis of self-timed VLSI circuits from graph-theoretic specifications","author":"chu","year":"1987"},{"key":"ref32","first-page":"1","article-title":"Slimming down petri boxes: Compact petri net models of control flows","author":"khomenko","year":"2022","journal-title":"Proc CONCUR"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/0471224146"},{"key":"ref1","author":"sparso","year":"2002","journal-title":"Principles of Asynchronous Circuit Design"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HICSS.1993.270624"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2907905"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2019.00017"},{"key":"ref18","first-page":"541","article-title":"Output-determinacy and asynchronous circuit synthesis","volume":"88","author":"khomenko","year":"2008","journal-title":"Fundamenta Informaticae"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2000.896490"},{"key":"ref23","year":"2007","journal-title":"CaSCADE tools"},{"key":"ref26","year":"2007","journal-title":"Logic Friday"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2016.10"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-10003-2_79"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s00236-009-0102-y"},{"key":"ref21","author":"milner","year":"1989","journal-title":"Communication and Concurrency"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2872678"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4613-2821-6"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2013.196"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"226","DOI":"10.1007\/BF01660034","article-title":"Compiling communicating processes into delay-insensitive VLSI circuits","volume":"1","author":"martin","year":"2005","journal-title":"Distrib Comput"},{"key":"ref7","first-page":"204","article-title":"A theory of asynchronous circuits","author":"muller","year":"1959","journal-title":"Proc Int Symp Theory Switching"},{"key":"ref9","first-page":"199","article-title":"Signal graphs: From self-timed to timed ones","author":"rosenblum","year":"1985","journal-title":"Proc Int Workshop Timed Petri Nets"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1991.139879"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/5.740016"},{"key":"ref6","author":"nowick","year":"1999","journal-title":"Minimalist homepage"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/43.743711"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10106059\/09889785.pdf?arnumber=9889785","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T20:24:19Z","timestamp":1773779059000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9889785\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,5]]},"references-count":32,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3206732","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,5]]}}}