{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,14]],"date-time":"2026-05-14T22:43:13Z","timestamp":1778798593661,"version":"3.51.4"},"reference-count":43,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,1]],"date-time":"2023-06-01T00:00:00Z","timestamp":1685577600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["NSF-2008144"],"award-info":[{"award-number":["NSF-2008144"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"name":"DARPA IDEA"},{"DOI":"10.13039\/100000001","name":"NSF CAREER","doi-asserted-by":"publisher","award":["Award NSF-1751064"],"award-info":[{"award-number":["Award NSF-1751064"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF CAREER","doi-asserted-by":"publisher","award":["Award NSF-2047176"],"award-info":[{"award-number":["Award NSF-2047176"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,6]]},"DOI":"10.1109\/tcad.2022.3213611","type":"journal-article","created":{"date-parts":[[2022,10,11]],"date-time":"2022-10-11T19:31:32Z","timestamp":1665516692000},"page":"1912-1925","source":"Crossref","is-referenced-by-count":24,"title":["FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed Bandit"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9349-4964","authenticated-orcid":false,"given":"Walter Lau","family":"Neto","sequence":"first","affiliation":[{"name":"Silicon Realization Group, Synopsys Inc., Sunnyvale, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1144-7401","authenticated-orcid":false,"given":"Yingjie","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3634-3999","authenticated-orcid":false,"given":"Pierre-Emmanuel","family":"Gaillardon","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8840-1540","authenticated-orcid":false,"given":"Cunxi","family":"Yu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Utah, Salt Lake City, UT, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3394885.3431560"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203808"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586230"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1147\/rd.404.0407"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415615"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1016\/0196-8858(85)90002-8"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317876"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1023\/A:1013689704352"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593158"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147048"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3400302.3415657"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898000"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2018.00029"},{"key":"ref32","year":"2019","journal-title":"Opencores"},{"key":"ref2","article-title":"Yosys–A free Verilog synthesis suite","author":"wolf","year":"2016","journal-title":"Proc 21st Austrian Workshop Microelectron (Austrochip)"},{"key":"ref1","author":"mishchenko","year":"2010","journal-title":"ABC A System for Sequential Synthesis and Verification"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643530"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942145"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430622"},{"key":"ref38","author":"chandra","year":"2001","journal-title":"Parallel Programming in OpenMP"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488795"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689081"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430638"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317838"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317754"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2943570"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2019.8697679"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3439706.3447047"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/2068716.2068718"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898012"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2017.2721699"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586206"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240843"},{"key":"ref27","first-page":"15","article-title":"Kissat MAB: Combining VSIDS and CHB through multi-armed bandit","author":"cherif","year":"2021","journal-title":"Proc SAT Competition"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317930"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2019.00020"},{"key":"ref7","article-title":"DRiLLS: Deep reinforcement learning for logic synthesis","author":"hosny","year":"2019","journal-title":"rXiv 1911 04021"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP54787.2022.00013"},{"key":"ref4","first-page":"1","article-title":"LSOracle: A logic synthesis framework driven by artificial intelligence","author":"neto","year":"2019","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2617593"},{"key":"ref6","first-page":"50:1","article-title":"Developing synthesis flows without human knowledge","author":"yu","year":"2018","journal-title":"Proc 55th Annu Design Autom Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00065"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021735"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/10129269\/9916059-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10129269\/09916059.pdf?arnumber=9916059","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,19]],"date-time":"2023-06-19T18:08:13Z","timestamp":1687198093000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9916059\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6]]},"references-count":43,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3213611","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,6]]}}}