{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,7]],"date-time":"2026-05-07T16:16:55Z","timestamp":1778170615230,"version":"3.51.4"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-2007135"],"award-info":[{"award-number":["CCF-2007135"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-2113928"],"award-info":[{"award-number":["CCF-2113928"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["OISE-1854276"],"award-info":[{"award-number":["OISE-1854276"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,7]]},"DOI":"10.1109\/tcad.2022.3216552","type":"journal-article","created":{"date-parts":[[2022,11,3]],"date-time":"2022-11-03T22:07:51Z","timestamp":1667513271000},"page":"2290-2302","source":"Crossref","is-referenced-by-count":10,"title":["Hot-Trim: Thermal and Reliability Management for Commercial Multicore Processors Considering Workload Dependent Hot Spots"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4396-4988","authenticated-orcid":false,"given":"Jinwei","family":"Zhang","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of California at Riverside, Riverside, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7474-3366","authenticated-orcid":false,"given":"Sheriff","family":"Sadiqbatcha","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of California at Riverside, Riverside, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2119-6869","authenticated-orcid":false,"given":"Sheldon X.-D.","family":"Tan","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of California at Riverside, Riverside, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.17"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001394"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364540"},{"key":"ref4","first-page":"579","article-title":"Distributed task migration for thermal management in many-core systems","volume-title":"Proc. Design Autom. Conf. (DAC)","author":"Ge"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176460"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2309331"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2878168"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3007541"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2017.2774704"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116545"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3088081"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.343"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593199"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2742060.2742078"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273529"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430630"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430623"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CCWC.2018.8301711"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593180"},{"key":"ref20","volume-title":"VLSI Systems Long-Term Reliability\u2014Modeling, Simulation and Optimization","author":"Tan","year":"2019"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2004.1310781"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1996.545600"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.1999.799346"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.28"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2004.1345483"},{"key":"ref26","volume-title":"Hot-Carrier Effects in MOS Devices","author":"Takeda","year":"1995"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263957"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273538"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629264"},{"key":"ref30","volume-title":"Intel performance counter monitor (PCM).","year":"2017"},{"key":"ref31","volume-title":"AMD uProf.","year":"2022"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3086112"},{"key":"ref33","article-title":"Benchmarking modern multiprocessors","author":"Bienia","year":"2011"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/225830.223990"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2661808"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS45731.2020.9180475"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/10155504\/9926126-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10155504\/09926126.pdf?arnumber=9926126","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T22:18:06Z","timestamp":1705961886000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9926126\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7]]},"references-count":36,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3216552","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,7]]}}}