{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T15:25:39Z","timestamp":1773761139452,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"The Research Grants Council of Hong Kong SAR","award":["CUHK24209017"],"award-info":[{"award-number":["CUHK24209017"]}]},{"DOI":"10.13039\/501100001809","name":"National Science Foundation of China","doi-asserted-by":"publisher","award":["62141404"],"award-info":[{"award-number":["62141404"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Science Foundation of China","doi-asserted-by":"publisher","award":["62034007"],"award-info":[{"award-number":["62034007"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,7]]},"DOI":"10.1109\/tcad.2022.3217668","type":"journal-article","created":{"date-parts":[[2022,11,4]],"date-time":"2022-11-04T00:43:16Z","timestamp":1667522596000},"page":"2317-2330","source":"Crossref","is-referenced-by-count":17,"title":["FastGR: Global Routing on CPU\u2013GPU With Heterogeneous Task Graph Scheduler"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2454-5561","authenticated-orcid":false,"given":"Siting","family":"Liu","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong, SAR"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1322-5642","authenticated-orcid":false,"given":"Yuan","family":"Pu","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong, SAR"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1220-1363","authenticated-orcid":false,"given":"Peiyu","family":"Liao","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong, SAR"}]},{"given":"Hongzhong","family":"Wu","sequence":"additional","affiliation":[{"name":"HiSilicon, Shenzhen, China"}]},{"given":"Rui","family":"Zhang","sequence":"additional","affiliation":[{"name":"HiSilicon, Shenzhen, China"}]},{"given":"Zhitang","family":"Chen","sequence":"additional","affiliation":[{"name":"Huawei Noah&#x2019;s Ark Lab, Shatin, Hong Kong"}]},{"given":"Wenlong","family":"Lv","sequence":"additional","affiliation":[{"name":"Huawei Technologies Company, Shenzhen, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0977-2774","authenticated-orcid":false,"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Peking University, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6406-4810","authenticated-orcid":false,"given":"Bei","family":"Yu","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong, SAR"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2015.06.008"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105336"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774606"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2012.02.007"},{"key":"ref31","year":"2009","journal-title":"Zero copy technique"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2019.00105"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2006082"},{"key":"ref10","first-page":"576","article-title":"FastRoute 4.0: Global router with efficient via minimization","author":"xu","year":"2009","journal-title":"Proc ASPDAC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3003234"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC52403.2022.9712557"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907068"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/43.391737"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2894653"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3177540.3178239"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837323"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681595"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942107"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629999"},{"key":"ref20","first-page":"232","article-title":"A new global router for modern designs","author":"gao","year":"2008","journal-title":"Proc ASPDAC"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2013991"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2234489"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/800263.809184"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-9260(01)00020-7"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1972.223482"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.1013891"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1979.1600153"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1155\/2012\/608362"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2927542"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218646"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1735023.1735035"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488922"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10155504\/09931135.pdf?arnumber=9931135","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,10]],"date-time":"2023-07-10T19:20:36Z","timestamp":1689016836000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9931135\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7]]},"references-count":31,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2022.3217668","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,7]]}}}