{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,25]],"date-time":"2025-11-25T06:56:55Z","timestamp":1764053815710,"version":"3.37.3"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2023,9,1]],"date-time":"2023-09-01T00:00:00Z","timestamp":1693526400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,9,1]],"date-time":"2023-09-01T00:00:00Z","timestamp":1693526400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,9,1]],"date-time":"2023-09-01T00:00:00Z","timestamp":1693526400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61834002"],"award-info":[{"award-number":["61834002"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2021YFB3100903"],"award-info":[{"award-number":["2021YFB3100903"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Shanghai Microwave Equipment Research Institute","award":["2022-XXXX-ZD-005-00"],"award-info":[{"award-number":["2022-XXXX-ZD-005-00"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2023,9]]},"DOI":"10.1109\/tcad.2023.3239563","type":"journal-article","created":{"date-parts":[[2023,1,24]],"date-time":"2023-01-24T19:10:27Z","timestamp":1674587427000},"page":"2938-2951","source":"Crossref","is-referenced-by-count":9,"title":["M2STaR: A Multimode Spatio-Temporal Redundancy Design for Fault-Tolerant Coarse-Grained Reconfigurable Architectures"],"prefix":"10.1109","volume":"42","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9918-5839","authenticated-orcid":false,"given":"Xiangyu","family":"Kong","sequence":"first","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jianfeng","family":"Zhu","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3711-9518","authenticated-orcid":false,"given":"Xingchen","family":"Man","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guihuan","family":"Song","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chenchen","family":"Deng","sequence":"additional","affiliation":[{"name":"Beijing National Research Center for Information Science and Technology, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9055-5290","authenticated-orcid":false,"given":"Pengfei","family":"Gou","sequence":"additional","affiliation":[{"name":"Chip Design Department, Hexin Technology Company Ltd., Guangzhou, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2309-572X","authenticated-orcid":false,"given":"Shouyi","family":"Yin","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5117-7920","authenticated-orcid":false,"given":"Shaojun","family":"Wei","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7548-4116","authenticated-orcid":false,"given":"Leibo","family":"Liu","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Tsinghua University, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-802459-1.00004-X"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2997646"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2019.2925086"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-014-9129-6"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2012.39"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2022.104467"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2010.5546249"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2013.6567558"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2513762"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2017.8046357"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.23"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3140944"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/EH.2001.937949"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.18"},{"journal-title":"PACT XPP Technologies","year":"2022","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3357375"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2005.34"},{"key":"ref39","first-page":"1","article-title":"Compensating detection latency of FPGA scrubbers with a collaborative functional hardware duplication","author":"khaledi","year":"2021","journal-title":"Proc IEEE Microelectron Design Test Symp (MDTS)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-73909-0_5"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/3457198"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2013.54"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1147\/rd.516.0639"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2020.3007492"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.8"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2616405"},{"key":"ref45","volume":"2","author":"ross","year":"1996","journal-title":"Stochastic Processes"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2843943"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2017.7995277"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2017.2728814"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2011.7"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446060"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/CCWC54503.2022.9720746"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCC-CSS-ICESS.2015.294"},{"journal-title":"Estimating TMR Reliability on FPGAs Using Markov Models","year":"2008","author":"mcmurtrey","key":"ref44"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2011.5783133"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750414"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2012.6233007"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.68"},{"key":"ref29","first-page":"462","article-title":"Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection","author":"ku","year":"2013","journal-title":"Proc IEEE Int Conf Field Program Technol (FPT)"},{"journal-title":"MicroBlaze Processor Reference Guide","year":"2021","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1587\/elex.4.657"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.120"},{"journal-title":"Fault Tolerant Techniques on CGRA","year":"2013","author":"kang","key":"ref4"},{"journal-title":"Reconfigurable\/Reprogrammable Communication Systems NASA SBIR & STTR Program Homepage","year":"2022","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723154"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2014.37"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2022.3151977"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10225609\/10025362.pdf?arnumber=10025362","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,11]],"date-time":"2023-09-11T18:09:27Z","timestamp":1694455767000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10025362\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,9]]},"references-count":47,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2023.3239563","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2023,9]]}}}