{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,22]],"date-time":"2026-07-22T23:21:02Z","timestamp":1784762462382,"version":"3.55.0"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2930.001"],"award-info":[{"award-number":["2930.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2024,1]]},"DOI":"10.1109\/tcad.2023.3303851","type":"journal-article","created":{"date-parts":[[2023,8,9]],"date-time":"2023-08-09T17:28:50Z","timestamp":1691602130000},"page":"217-229","source":"Crossref","is-referenced-by-count":4,"title":["DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5992-8554","authenticated-orcid":false,"given":"Shamik","family":"Kundu","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5188-1651","authenticated-orcid":false,"given":"Suvadeep","family":"Banerjee","sequence":"additional","affiliation":[{"name":"Strategic CAD Labs, Intel Corporation, Santa Clara, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8848-1069","authenticated-orcid":false,"given":"Arnab","family":"Raha","sequence":"additional","affiliation":[{"name":"Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Suriyaprakash","family":"Natarajan","sequence":"additional","affiliation":[{"name":"Manufacturing and Product Engineering, Intel Corporation, Santa Clara, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6431-7512","authenticated-orcid":false,"given":"Kanad","family":"Basu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750389"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001177"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.29"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080254"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3140659.3080246"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00015"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2018.8368656"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3048829"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40793-2_15"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3394885.3431519"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2019.2915656"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2933678"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3107401"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2019.00053"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44170.2019.9000149"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2008.916877"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0602"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3241218"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2019.2928962"},{"key":"ref20","first-page":"578","article-title":"{TVM}: An automated {End-to-End} optimizing compiler for deep learning","volume-title":"Proc. 13th USENIX Symp. Operat. Syst. Design Implement. (OSDI)","author":"Chen"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1067649.801719"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465834"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1016\/j.infsof.2006.09.001"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/QSIC.2004.1357950"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1002\/stvr.353"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2007.70722"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2245376"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2008.4700553"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2011.6139171"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.807889"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50571.2021.00015"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2013.6604049"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.298"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1007\/BF01890115"},{"issue":"85","key":"ref36","first-page":"2825","article-title":"Scikit-learn: Machine learning in python","volume":"12","author":"Pedregosa","year":"2011","journal-title":"J. Mach. Learn. Res."},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/3236009"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1016\/0146-664X(80)90054-4"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10372473\/10214146.pdf?arnumber=10214146","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,12]],"date-time":"2024-01-12T00:25:52Z","timestamp":1705019152000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10214146\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1]]},"references-count":38,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2023.3303851","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1]]}}}