{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:50:05Z","timestamp":1780674605973,"version":"3.54.1"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["2216772"],"award-info":[{"award-number":["2216772"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["2216773"],"award-info":[{"award-number":["2216773"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2024,1]]},"DOI":"10.1109\/tcad.2023.3305574","type":"journal-article","created":{"date-parts":[[2023,8,15]],"date-time":"2023-08-15T17:38:15Z","timestamp":1692121095000},"page":"141-150","source":"Crossref","is-referenced-by-count":16,"title":["PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0900-8768","authenticated-orcid":false,"given":"Arman","family":"Roohi","sequence":"first","affiliation":[{"name":"School of Computing, University of Nebraska–Lincoln, Lincoln, NE, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sepehr","family":"Tabrizchi","sequence":"additional","affiliation":[{"name":"School of Computing, University of Nebraska–Lincoln, Lincoln, NE, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mehrdad","family":"Morsali","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5705-2501","authenticated-orcid":false,"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2289-6381","authenticated-orcid":false,"given":"Shaahin","family":"Angizi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Digging up dark data: What puts IBM at the forefront of insight economy","author":"Johnson","year":"2015"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778074"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1117\/12.342849"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2022.3179370"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-022-17934-1"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC54400.2022.9939582"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993452"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870271"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.31"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3015902"},{"key":"ref11","first-page":"C182","article-title":"A 100,000 fps vision sensor with embedded 535GOPS\/W 256\u00d7256 SIMD processor array","volume-title":"Proc. Symp. VLSI Circuits","author":"Carey"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3034192"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2019.00142"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/tetc.2023.3285493"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3090668"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3583781.3590225"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/tetc.2023.3292251"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2022.3210509"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2023.3242167"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD56317.2022.00117"},{"key":"ref21","volume-title":"Cacti 6.0: A Tool to Model Large Caches","author":"Muralimanohar","year":"2009"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2402435"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2414456"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2017.2729466"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2789723"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS51828.2021.9458494"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2966484"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2885752"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2022.102528"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3323439.3323989"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2481793"},{"key":"ref34","volume-title":"DRAM power model","year":"2010"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref36","volume-title":"ADC performance survey 1997\u20132016","author":"Murmann","year":"2018"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/1229175.1229176"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757366"},{"key":"ref39","article-title":"Binarized neural networks: Training deep neural networks with weights and activations constrained to +1 or \u22121","author":"Courbariaux","year":"2016","journal-title":"arXiv:1602.02830"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/10372473\/10217181-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10372473\/10217181.pdf?arnumber=10217181","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,11]],"date-time":"2024-01-11T23:49:19Z","timestamp":1705016959000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10217181\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1]]},"references-count":39,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2023.3305574","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1]]}}}