{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T12:19:53Z","timestamp":1767183593914,"version":"3.37.3"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000006","name":"Office of Naval Research","doi-asserted-by":"publisher","award":["P0326838"],"award-info":[{"award-number":["P0326838"]}],"id":[{"id":"10.13039\/100000006","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2024,10]]},"DOI":"10.1109\/tcad.2024.3387350","type":"journal-article","created":{"date-parts":[[2024,4,10]],"date-time":"2024-04-10T18:16:31Z","timestamp":1712772991000},"page":"3068-3082","source":"Crossref","is-referenced-by-count":3,"title":["The Road Not Taken: eFPGA Accelerators Utilized for SoC Security Auditing"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-9865-5061","authenticated-orcid":false,"given":"Mridha Md Mashahedur","family":"Rahman","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7671-6409","authenticated-orcid":false,"given":"Shams","family":"Tarek","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kimia Zamiri","family":"Azar","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mark","family":"Tehranipoor","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Farimah","family":"Farahmandi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2021.3058162"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2930412"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9473910"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00002"},{"volume-title":"Fuzz, penetration, and AI testing for SoC security verification: Challenges and solutions","year":"2022","author":"Azar","key":"ref5"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2360535"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372616"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898020"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297409"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/cp.2018.0010"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2857041"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/AsianHOST51057.2020.9358258"},{"key":"ref13","article-title":"System-on-chip security assertions","author":"Lyu","year":"2020","journal-title":"arXiv:2001.06719"},{"volume-title":"UltraSoC embedded Analytics for SoCs","year":"2023","key":"ref14"},{"key":"ref15","first-page":"807","article-title":"PHMon: A programmable hardware monitor and its security use cases","volume-title":"Proc. 29th USENIX Secur. Symp. (USENIX Security 20)","author":"Delshadtehrani"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3271583"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/iSES52644.2021.00100"},{"volume-title":"SoC security properties and rules","year":"2021","author":"Farzana","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DFT59622.2023.10313548"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2995854"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3609107"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3080257"},{"volume-title":"Advances in logic locking: Past, present, and prospects","year":"2022","author":"Kamali","key":"ref23"},{"article-title":"Rethinking watermark: Providing proof of IP ownership in modern SoCs","year":"2022","author":"Anandakumar","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/VTS56346.2023.10140093"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516656"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.13154\/tches.v2020.i1.348-375"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3566097.3567918"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.912030"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1387393"},{"key":"ref31","volume-title":"Computer Security: Principles and Practice","volume":"2","author":"Stallings","year":"2012"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1244002.1244336"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI59464.2023.10238612"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137139"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/tifs.2024.3372800"},{"volume-title":"HW CWEs","year":"2019","key":"ref36"},{"volume-title":"HACK@DAC\u201923","year":"2023","key":"ref37"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/VTS50974.2021.9441039"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-16214-0_42"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2926114"},{"volume-title":"SkyWater open source PDK, Skywater technology","year":"2020","key":"ref41"},{"volume-title":"Genesys 2 FGPGA development board","year":"2016","key":"ref42"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2915318"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/DCAS57389.2023.10130190"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2950087"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/mdat.2023.3292208"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10684348\/10496439.pdf?arnumber=10496439","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,20]],"date-time":"2024-09-20T06:25:33Z","timestamp":1726813533000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10496439\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10]]},"references-count":46,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3387350","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2024,10]]}}}