{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,25]],"date-time":"2026-06-25T17:32:20Z","timestamp":1782408740251,"version":"3.54.5"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62234010"],"award-info":[{"award-number":["62234010"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"111 Project of China","doi-asserted-by":"publisher","award":["61574109"],"award-info":[{"award-number":["61574109"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Science and Technology Development Program of Shaanxi","award":["2023-YBGY-273"],"award-info":[{"award-number":["2023-YBGY-273"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2024,10]]},"DOI":"10.1109\/tcad.2024.3392758","type":"journal-article","created":{"date-parts":[[2024,4,23]],"date-time":"2024-04-23T19:03:11Z","timestamp":1713898991000},"page":"3212-3225","source":"Crossref","is-referenced-by-count":10,"title":["MaPart: An Efficient Multi-FPGA System-Aware Hypergraph Partitioning Framework"],"prefix":"10.1109","volume":"43","author":[{"given":"Benzheng","family":"Li","sequence":"first","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-1341-3977","authenticated-orcid":false,"given":"Shunyang","family":"Bi","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3427-5320","authenticated-orcid":false,"given":"Hailong","family":"You","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9110-4248","authenticated-orcid":false,"given":"Zhongdong","family":"Qi","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Guangxin","family":"Guo","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Richard","family":"Sun","sequence":"additional","affiliation":[{"name":"emulation department of S2C Inc., Shenzhen, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8587-0747","authenticated-orcid":false,"given":"Yuming","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Microelectronics, Xidian University, Xi’an, Shaanxi, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1998.646609"},{"key":"ref2","first-page":"118","volume-title":"Combinatorial Algorithms for Integrated Circuit Layout","volume":"9","author":"Esrom","year":"1991"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1970.tb01770.x"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/62882.62910"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1997.597203"},{"key":"ref6","first-page":"1479","article-title":"Patoh (partitioning tool for hypergraphs)","volume-title":"Encyclopedia of Parallel Computing","author":"\u00c7ataly\u00fcrek","year":"2011"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1090\/conm\/588\/11704"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611974768.3"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/3529090","article-title":"High-quality hypergraph partitioning","volume":"27","author":"Schlag","year":"2023","journal-title":"ACM J. Exp. Algorithmics"},{"key":"ref10","first-page":"1","article-title":"SpecPart: A supervised spectral framework for hypergraph partitioning solution improvement","volume-title":"Proc. 41st IEEE\/ACM Int. Conf. Comput.-Aided Design","author":"Bustany"},{"key":"ref11","first-page":"106","article-title":"Pin assignment optimization for multi-2.5 d FPGA-based systems","volume-title":"Proc. Int. Symp. Phys. Design","author":"Kuo"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3177540.3177542"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586225"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2021.11.005"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643481"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3372780.3375558"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3583781.3590231"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942051"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218569"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218667"},{"key":"ref21","first-page":"176","article-title":"Multi-FPGA co-optimization: Hybrid routing and competitive-based time division multiplexing assignment","volume-title":"Proc. 26th Asia South Pac. Design Autom. Conf.","author":"Zheng"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1993.279469"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2629579"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/10684348\/10507195.pdf?arnumber=10507195","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,20]],"date-time":"2024-09-20T17:25:29Z","timestamp":1726853129000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10507195\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10]]},"references-count":23,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3392758","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,10]]}}}