{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T02:35:12Z","timestamp":1771468512534,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2994.001"],"award-info":[{"award-number":["2994.001"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Science Foundation","award":["CNS-2011561"],"award-info":[{"award-number":["CNS-2011561"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2025,1]]},"DOI":"10.1109\/tcad.2024.3416865","type":"journal-article","created":{"date-parts":[[2024,6,19]],"date-time":"2024-06-19T17:26:20Z","timestamp":1718817980000},"page":"357-370","source":"Crossref","is-referenced-by-count":7,"title":["TaintLock: Hardware IP Protection Against Oracle-Guided and Oracle-Reconstruction Attacks"],"prefix":"10.1109","volume":"44","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7079-5281","authenticated-orcid":false,"given":"Jonti","family":"Talukdar","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arjun","family":"Chaudhuri","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer and Energy Engineering, ASU Center for Semiconductor Microelectronics, Arizona State University, Tempe, AZ, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-2570-4901","authenticated-orcid":false,"given":"Eduardo","family":"Ortega","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer and Energy Engineering, ASU Center for Semiconductor Microelectronics, Arizona State University, Tempe, AZ, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4475-6435","authenticated-orcid":false,"given":"Krishnendu","family":"Chakrabarty","sequence":"additional","affiliation":[{"name":"School of Electrical, Computer and Energy Engineering, ASU Center for Semiconductor Microelectronics, Arizona State University, Tempe, AZ, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ETS54262.2022.9810399"},{"key":"ref2","article-title":"Benchmarking at the frontier of hardware security: Lessons from logic locking","author":"Tan","year":"2020","journal-title":"arXiv:2006.06806"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.23919\/date56975.2023.10137145"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2944586"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3029133"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3080257"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116197"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2019.2940750"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2006.7"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.85"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI51109.2021.00033"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/vts.2017.7928947"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2915606"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2818722"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2023.102067"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3097348"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.6028\/nist.sp.800-38c"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882600"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2591796.2591825"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-48285-7_33"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1201\/9781420010756"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50571.2021.00025"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3453688.3461760"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-08867-9_49"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-78800-3_24"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-70545-1_28"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715053"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3444960"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9473972"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474128"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3166108"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.826558"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2019.02.019"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74735-2_31"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/10814105\/10564193-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/10814105\/10564193.pdf?arnumber=10564193","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,25]],"date-time":"2024-12-25T06:32:18Z","timestamp":1735108338000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10564193\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,1]]},"references-count":34,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3416865","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,1]]}}}