{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,17]],"date-time":"2025-09-17T15:20:21Z","timestamp":1758122421430,"version":"3.37.3"},"reference-count":61,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T00:00:00Z","timestamp":1740787200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2022YFB4500303"],"award-info":[{"award-number":["2022YFB4500303"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62227809","62302290"],"award-info":[{"award-number":["62227809","62302290"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100012226","name":"Fundamental Research Funds for the Central Universities","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100012226","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Shanghai Municipal Science and Technology Major Project","award":["2021SHZDZX0102"],"award-info":[{"award-number":["2021SHZDZX0102"]}]},{"name":"Natural Science Foundation of Shanghai","award":["22ZR1435400"],"award-info":[{"award-number":["22ZR1435400"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2025,3]]},"DOI":"10.1109\/tcad.2024.3455237","type":"journal-article","created":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T18:20:53Z","timestamp":1725560453000},"page":"1126-1140","source":"Crossref","is-referenced-by-count":1,"title":["Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration"],"prefix":"10.1109","volume":"44","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2321-367X","authenticated-orcid":false,"given":"Yifan","family":"Hua","sequence":"first","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2485-760X","authenticated-orcid":false,"given":"Shengan","family":"Zheng","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering and the MoE Key Laboratory of Artificial Intelligence, AI Institute, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-6922-1740","authenticated-orcid":false,"given":"Weihan","family":"Kong","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cong","family":"Zhou","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1531-7962","authenticated-orcid":false,"given":"Linpeng","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530420"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00050"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.56"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.20"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137177"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3231836"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.39"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00012"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2019.00101"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218658"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/micro.2012.30"},{"key":"ref12","first-page":"1","article-title":"ReTagger: An efficient controller for DRAM cache architectures","volume-title":"Proc. 56th Annu. Design Autom. Conf.","author":"Bojnordi"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA56546.2023.10071016"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2023.3251852"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774723"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3600006.3613167"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS57527.2023.00046"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/hpca57654.2024.00021"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485957"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2872887.2750383"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.51"},{"key":"ref22","first-page":"1","article-title":"Banshee: Bandwidth-efficient DRAM caching via software\/hardware cooperation","volume-title":"Proc. 50th Annu. IEEE\/ACM Int. Symp. Microarchit.","author":"Yu"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00059"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA56546.2023.10071115"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10248000"},{"key":"ref26","first-page":"105","article-title":"Demystifying CXL memory with genuine CXL-ready systems and devices","volume-title":"Proc. 56th Annu. IEEE\/ACM Int. Symp. Microarchit.","author":"Sun"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2022.3227544"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2016.25"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3579445"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-67630-2_31"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/SPIN52536.2021.9566081"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/PDGC.2012.6449844"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.116"},{"volume-title":"High Bandwidth Memory (HBM) DRAM","year":"2023","key":"ref34"},{"volume-title":"DDR4 Datasheet","year":"2023","key":"ref35"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2011.7477494"},{"volume-title":"NAS benchmark","year":"2023","key":"ref37"},{"volume-title":"Stream benchmark","year":"2023","key":"ref38"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3297663.3310311"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00032"},{"article-title":"Experiments with SPEC CPU 2017: Similarity, balance, phase behavior and SimPoints","year":"2018","author":"Song","key":"ref41"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1587\/transele.2021LHP0004"},{"volume-title":"Intel Optane DC Persistent Memory","year":"2020","key":"ref43"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1116\/1.3301579"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629589"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/3575693.3578835"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2021.102279"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/3204454"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-73200-4_27"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2014.22"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1145\/1111583.1111594"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2018.00201"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.2172\/993908"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.63"},{"key":"ref55","first-page":"1","article-title":"The feasibility of utilizing low-power DRAM in disaggregated memory systems","volume-title":"Proc. Int. Symp. Memory Syst.","author":"Akram"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2019.00017"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1147\/rd.462.0187"},{"key":"ref58","first-page":"315","article-title":"AIFM: High-Performance, Application-Integrated far memory","volume-title":"Proc. 14th USENIX Symp. Oper. Syst. Design Implement. (OSDI)","author":"Ruan"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1145\/605432.605403"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2011.4"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/10896910\/10666897.pdf?arnumber=10666897","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T18:43:58Z","timestamp":1740163438000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10666897\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3]]},"references-count":61,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3455237","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2025,3]]}}}