{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,17]],"date-time":"2026-07-17T23:13:53Z","timestamp":1784330033756,"version":"3.55.0"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T00:00:00Z","timestamp":1748736000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T00:00:00Z","timestamp":1748736000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T00:00:00Z","timestamp":1748736000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Swiss National Science Foundation \u201cSupercool: Design Methods and Tools for Superconducting Electronics\u201d","award":["200021_1920981"],"award-info":[{"award-number":["200021_1920981"]}]},{"DOI":"10.13039\/100007140","name":"Synopsys Inc.","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007140","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Key Research and Development Program of China","award":["2021ZD0114701"],"award-info":[{"award-number":["2021ZD0114701"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2025,6]]},"DOI":"10.1109\/tcad.2024.3510513","type":"journal-article","created":{"date-parts":[[2024,12,2]],"date-time":"2024-12-02T13:39:22Z","timestamp":1733146762000},"page":"2040-2053","source":"Crossref","is-referenced-by-count":7,"title":["Efficient Resubstitution-Based Approximate Logic Synthesis"],"prefix":"10.1109","volume":"44","author":[{"given":"Chang","family":"Meng","sequence":"first","affiliation":[{"name":"Integrated Systems Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alan","family":"Mishchenko","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5129-9431","authenticated-orcid":false,"given":"Weikang","family":"Qian","sequence":"additional","affiliation":[{"name":"University of Michigan-Shanghai Jiao Tong University Joint Institute and the MoE Key Laboratory of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7827-3215","authenticated-orcid":false,"given":"Giovanni","family":"De Micheli","sequence":"additional","affiliation":[{"name":"Integrated Systems Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569370"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2505723"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3014430"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691096"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691108"},{"key":"ref6","first-page":"1449","article-title":"A new approximate adder with low relative error and correct sign calculation","volume-title":"Proc. Design, Autom. Test Europe (DATE)","author":"Hu"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2018.2851749"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.108"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967005"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714868"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763248"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2657799"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967003"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342067"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774604"},{"key":"ref16","first-page":"146","article-title":"Approximate logic synthesis by genetic algorithm with an error rate guarantee","volume-title":"Proc. Asia South Pac. Design Autom. Conf. (ASPDAC)","author":"Lee"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465702"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3054603"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218627"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2915328"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240790"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.280"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2897982"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203798"},{"key":"ref25","first-page":"266","article-title":"An efficient approximate node merging with an error rate guarantee","volume-title":"Proc. Asia South Pac. Design Autom. Conf. (ASPDAC)","author":"Tam"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10136950"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-W58399.2023.00049"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465838"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3149717"},{"key":"ref30","first-page":"1","article-title":"Partition and propagate: An error derivation algorithm for the design of approximate circuits","volume-title":"Proc. Design Autom. Conf. (DAC)","author":"Scarabottolo"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218536"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247856"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3268221"},{"key":"ref34","first-page":"15","article-title":"Scalable logic synthesis using a simple circuit structure","volume-title":"Proc. Int. Workshop Logic Synth. (IWLS)","author":"Mishchenko"},{"key":"ref35","first-page":"1","article-title":"Scalable generic logic synthesis: One approach to rule them all","volume-title":"Proc. Design Autom. Conf. (DAC)","author":"Riener"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3108704"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.860955"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/157485.165069"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC52403.2022.9712552"},{"key":"ref40","volume-title":"ABC: A system for sequential synthesis and verification","author":"Mishchenko","year":"2024"},{"key":"ref41","volume-title":"Nangate 45nm Open Cell Library","year":"2022"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/54.785838"},{"key":"ref43","volume-title":"BACS: Benchmarks for approximate circuit synthesis","year":"2024"},{"key":"ref44","volume-title":"The EPFL Combinational Benchmark Suite","year":"2024"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323820"},{"key":"ref46","volume-title":"Logic Synthesis and Optimization Benchmarks User Guide: Version 3.0","author":"Yang","year":"1991"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/11007940\/10772636.pdf?arnumber=10772636","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T18:43:15Z","timestamp":1763750595000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10772636\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6]]},"references-count":46,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3510513","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,6]]}}}