{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T18:50:27Z","timestamp":1763751027222,"version":"3.45.0"},"reference-count":41,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100006730","name":"German Federal Ministry of Education and Research through Scale4Edge","doi-asserted-by":"publisher","award":["16ME0134"],"award-info":[{"award-number":["16ME0134"]}],"id":[{"id":"10.13039\/501100006730","id-type":"DOI","asserted-by":"publisher"}]},{"name":"VE-HEP","award":["16KIS1339K"],"award-info":[{"award-number":["16KIS1339K"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2025,7]]},"DOI":"10.1109\/tcad.2025.3526748","type":"journal-article","created":{"date-parts":[[2025,1,6]],"date-time":"2025-01-06T14:33:27Z","timestamp":1736174007000},"page":"2599-2612","source":"Crossref","is-referenced-by-count":1,"title":["Accelerate SEU Simulation-Based Fault Injection With Spatio-Temporal Graph Convolutional Networks"],"prefix":"10.1109","volume":"44","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6720-9066","authenticated-orcid":false,"given":"Li","family":"Lu","sequence":"first","affiliation":[{"name":"System Architectures, IHP-Leibniz-Institut f&#x00FC;r Innovative Mikroelektronik, Frankfurt, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4413-0937","authenticated-orcid":false,"given":"Junchao","family":"Chen","sequence":"additional","affiliation":[{"name":"System Architectures, IHP-Leibniz-Institut f&#x00FC;r Innovative Mikroelektronik, Frankfurt, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0944-7867","authenticated-orcid":false,"given":"Aneesh","family":"Balakrishnan","sequence":"additional","affiliation":[{"name":"System Architectures, IHP-Leibniz-Institut f&#x00FC;r Innovative Mikroelektronik, Frankfurt, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9230-640X","authenticated-orcid":false,"given":"Markus","family":"Ulbricht","sequence":"additional","affiliation":[{"name":"System Architectures, IHP-Leibniz-Institut f&#x00FC;r Innovative Mikroelektronik, Frankfurt, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0267-0203","authenticated-orcid":false,"given":"Milos","family":"Krstic","sequence":"additional","affiliation":[{"name":"System Architectures, IHP-Leibniz-Institut f&#x00FC;r Innovative Mikroelektronik, Frankfurt, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.14"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2018.02.017"},{"issue":"2","key":"ref3","first-page":"171","article-title":"A survey on fault injection techniques","volume":"1","author":"Ziade","year":"2004","journal-title":"Int. Arab J. Inf. Technol."},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2000.887182"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2001.937810"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2008.4630080"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090716"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICRMS.2011.5979292"},{"key":"ref9","first-page":"1","article-title":"A methodology for stochastic fault simulation in vlsi processor architectures","volume-title":"Proc. MoBs","author":"Hesscot"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2011.58"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3069664"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3147587"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3201431"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3289325"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3010743"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2906155"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DSN-S.2019.00021"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/NorCAS53631.2021.9599646"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2024.3349928"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.24963\/ijcai.2018\/505"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546750"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2021.3084827"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2020.2978386"},{"key":"ref24","article-title":"Semi-supervised classification with graph convolutional networks","volume-title":"arXiv:1609.02907","author":"Kipf","year":"2017"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2012.2235192"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3331968"},{"volume-title":"Design Compiler","year":"2023","key":"ref27"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1038\/nbt0308-303"},{"key":"ref29","article-title":"Multi-scale context aggregation by dilated convolutions","volume-title":"arXiv:1511.07122","author":"Yu","year":"2016"},{"volume-title":"OpenCores","year":"1999","key":"ref30"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2654506"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/PATMOS.2017.8106976"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/S3S.2018.8640145"},{"volume-title":"Ibex Reference Guide","year":"2018","key":"ref34"},{"volume-title":"RISC-V Documentation","year":"2020","key":"ref35"},{"key":"ref36","first-page":"1","article-title":"Register and instruction coverage analysis for different RISC-V ISA modules","volume-title":"Proc. MBMV 24th Workshop","author":"Adelt"},{"volume-title":"Incisive Functional Safety Simulator","year":"2021","key":"ref37"},{"key":"ref38","article-title":"Deep graph library: A graph-centric, highly-performant package for graph neural networks","volume-title":"arXiv:1909.01315","author":"Wang","year":"2020"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/s10479-005-5724-z"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3197521"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2019.00007"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/11044910\/10829827.pdf?arnumber=10829827","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T18:43:11Z","timestamp":1763750591000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10829827\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7]]},"references-count":41,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2025.3526748","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2025,7]]}}}