{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,5]],"date-time":"2026-05-05T12:29:42Z","timestamp":1777984182215,"version":"3.51.4"},"reference-count":28,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62027826"],"award-info":[{"award-number":["62027826"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2026,2]]},"DOI":"10.1109\/tcad.2025.3591734","type":"journal-article","created":{"date-parts":[[2025,7,22]],"date-time":"2025-07-22T18:05:09Z","timestamp":1753207509000},"page":"882-886","source":"Crossref","is-referenced-by-count":0,"title":["FPGA-Friendly Architecture of Processing Elements for Efficient and Accurate Quantized CNNs"],"prefix":"10.1109","volume":"45","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4336-9732","authenticated-orcid":false,"given":"Botao","family":"Xiong","sequence":"first","affiliation":[{"name":"School of Integrated Circuits, Dalian University of Technology, Dalian, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-4219-1219","authenticated-orcid":false,"given":"Shize","family":"Zhang","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Dalian University of Technology, Dalian, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-0027-073X","authenticated-orcid":false,"given":"Xingyu","family":"Shao","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Dalian University of Technology, Dalian, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-7872-7894","authenticated-orcid":false,"given":"Xintong","family":"He","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Dalian University of Technology, Dalian, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9270-8839","authenticated-orcid":false,"given":"Yuchun","family":"Chang","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits, Dalian University of Technology, Dalian, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3289185"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2016.2585278"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2913958"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/dac18072.2020.9218516"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3624582"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO56248.2022.00095"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715262"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3342730"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2968023"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3474597"},{"key":"ref11","volume-title":"Higher Performance Neural Networks with Small Floating Point","year":"2021"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3205945"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2021.3105444"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCC59590.2023.10507273"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPL60245.2023.00055"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3150980"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/OJCAS.2020.3007334"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT56656.2022.9974441"},{"key":"ref19","volume-title":"Convolutional Neural Network with INT4 Optimization on Xilinx Devices","year":"2020"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CVPRW53098.2021.00346"},{"key":"ref21","article-title":"FP8 formats for deep learning","author":"Micikevicius","year":"2022","journal-title":"arXiv:2209.05433"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00030"},{"key":"ref23","volume-title":"Deep Learning with INT8 Optimization on Xilinx Devices","year":"2017"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2023.3241487"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT52863.2021.9609865"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2025.3539912"},{"key":"ref27","article-title":"EasyQuant: Post-training quantization via scale optimization","author":"Wu","year":"2020","journal-title":"arXiv:2006.16669"},{"key":"ref28","article-title":"Accelerating neural network inference by overflow aware quantization","author":"Xie","year":"2020","journal-title":"arXiv:2005.13297"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/11360509\/11089938.pdf?arnumber=11089938","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,22]],"date-time":"2026-01-22T21:02:00Z","timestamp":1769115720000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11089938\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,2]]},"references-count":28,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2025.3591734","relation":{"has-preprint":[{"id-type":"doi","id":"10.36227\/techrxiv.174535582.29330911\/v1","asserted-by":"object"}]},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,2]]}}}