{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,25]],"date-time":"2026-03-25T21:07:35Z","timestamp":1774472855991,"version":"3.50.1"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"AI Chip Center for Emerging Smart Systems (ACCESS) through InnoHK Funding, Hong Kong, SAR"},{"name":"Semiconductor Research Corporation (SRC) Logic and Memory Devices Program"},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["2212239"],"award-info":[{"award-number":["2212239"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2026,4]]},"DOI":"10.1109\/tcad.2025.3605857","type":"journal-article","created":{"date-parts":[[2025,9,3]],"date-time":"2025-09-03T17:53:43Z","timestamp":1756922023000},"page":"1663-1676","source":"Crossref","is-referenced-by-count":0,"title":["EvaCAM: A Circuit-Level Evaluation Tool for General Content Addressable Memories"],"prefix":"10.1109","volume":"45","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3307-1596","authenticated-orcid":false,"given":"Liu","family":"Liu","sequence":"first","affiliation":[{"name":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6345-0242","authenticated-orcid":false,"given":"Mohammad","family":"Mehdi Sharifi","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-9683-1138","authenticated-orcid":false,"given":"Kunshi","family":"Wang","sequence":"additional","affiliation":[{"name":"Nanjing University of Science and Technology, Nanjing, Jiangsu, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6085-0486","authenticated-orcid":false,"given":"Ruibin","family":"Mao","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3628-3431","authenticated-orcid":false,"given":"Kai","family":"Ni","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3795-2008","authenticated-orcid":false,"given":"Can","family":"Li","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4656-9545","authenticated-orcid":false,"given":"Xunzhao","family":"Yin","sequence":"additional","affiliation":[{"name":"College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, Zhejiang, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7776-4306","authenticated-orcid":false,"given":"Michael","family":"Niemier","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6636-9738","authenticated-orcid":false,"given":"Xiaobo","family":"Sharon Hu","sequence":"additional","affiliation":[{"name":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864128"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2021.3110464"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858404"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063054"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-15254-4"},{"key":"ref6","article-title":"Efficient analog CAM design","author":"Bazzi","year":"2022","journal-title":"arXiv:2203.02500"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164998"},{"key":"ref8","first-page":"298","article-title":"Fully parallel 6T-2MTJ nonvolatile TCAM with single-transistor-based self match-line discharge control","volume-title":"Symp. VLSI Circuits-Dig. Tech. Papers","author":"Matsunaga"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.2012.6243781"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2885343"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2292055"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2889225"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474234"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3259940"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247849"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9372119"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.3039477"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3136576"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED52811.2021.9502488"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00017"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0321-3"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/SNW50361.2020.9131657"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2994896"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720562"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10136923"},{"key":"ref26","article-title":"CACTI 6.0: A tool to model large caches","author":"Muralimanohar","year":"2009"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967059"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1126\/sciadv.adk8471"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2022.3216819"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-022-23116-w"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0733"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168603"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774572"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829399"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2015.7313897"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510622"},{"key":"ref38","volume-title":"EvaCAM","year":"2023"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/11450487\/11150515-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/11450487\/11150515.pdf?arnumber=11150515","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,25]],"date-time":"2026-03-25T19:56:25Z","timestamp":1774468585000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11150515\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4]]},"references-count":38,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2025.3605857","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,4]]}}}