{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T20:19:07Z","timestamp":1792786747441,"version":"4.5.0"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,9,1]],"date-time":"2026-09-01T00:00:00Z","timestamp":1788220800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Research Grants Council of Hong Kong SAR","award":["CUHK14207523"],"award-info":[{"award-number":["CUHK14207523"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["62302477"],"award-info":[{"award-number":["62302477"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2026,9]]},"DOI":"10.1109\/tcad.2026.3650860","type":"journal-article","created":{"date-parts":[[2026,1,5]],"date-time":"2026-01-05T18:39:00Z","timestamp":1767638340000},"page":"4177-4189","source":"Crossref","is-referenced-by-count":3,"title":["CHOP: Clustered Hybrid Optimization for Logic Synthesis With Self-Supervised Prediction"],"prefix":"10.1109","volume":"45","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3744-2083","authenticated-orcid":false,"given":"Rongliang","family":"Fu","sequence":"first","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-9615-2716","authenticated-orcid":false,"given":"Ran","family":"Zhang","sequence":"additional","affiliation":[{"name":"SKLP, Institute of Computing Technology","place":["Beijing, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ziyang","family":"Zheng","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhengyuan","family":"Shi","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yuan","family":"Pu","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5845-6965","authenticated-orcid":false,"given":"Junying","family":"Huang","sequence":"additional","affiliation":[{"name":"SKLP, Institute of Computing Technology","place":["Beijing, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6406-4810","authenticated-orcid":false,"given":"Bei","family":"Yu","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6747-126X","authenticated-orcid":false,"given":"Qiang","family":"Xu","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7348-5625","authenticated-orcid":false,"given":"Tsung-Yi","family":"Ho","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, China"],"department":["Department of Computer Science and Engineering"]}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2869760"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270347"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1963.263531"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593158"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41534-021-00514-y"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858312"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147048"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715185"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546807"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3256341"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342108"},{"key":"ref12","first-page":"15","article-title":"Scalable logic synthesis using a simple circuit structure","volume-title":"Proc. IWLS","volume":"6","author":"Brayton"},{"key":"ref13","first-page":"157","article-title":"Size optimization of MIGs with an application to QCA and STMG technologies","volume-title":"Proc. 14th IEEE\/ACM Int. Symp. Nanosc. Architectures","author":"Riener"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3108704"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509585"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942145"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3698364.3705354"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DAC63849.2025.11132399"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3529090"},{"key":"ref20","article-title":"The EPFL combinational benchmark suite","author":"Amar\u00fa","year":"2015"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/0022-5193(69)90015-0"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/j.physrep.2009.11.002"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevE.69.026113"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1088\/1742-5468\/2008\/10\/P10008"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-019-41695-z"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530497"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323798"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50671.2022.00027"},{"key":"ref29","article-title":"DeepSeq: Deep sequential circuit learning","author":"Khan","year":"2023","journal-title":"arXiv:2302.13608"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10248001"},{"key":"ref31","article-title":"EDA-driven preprocessing for SAT solving","author":"Shi","year":"2024","journal-title":"arXiv:2403.19446"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247828"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/3649329.3657386"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676834"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676791"},{"key":"ref36","first-page":"61","article-title":"Functionality matters in netlist representation learning","volume-title":"Proc. 59th ACM\/IEEE Design Autom. Conf.","author":"Wang"},{"key":"ref37","article-title":"The EPFL logic synthesis libraries","author":"Soeken","year":"2018","journal-title":"arXiv:1805.05121"},{"key":"ref38","first-page":"677","article-title":"A neutral netlist of 10 combinational benchmark circuits and a target translator in Fortran","author":"Brglez","year":"1985"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021735"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/11664532\/11328749.pdf?arnumber=11328749","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,8,25]],"date-time":"2026-08-25T05:32:00Z","timestamp":1787635920000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11328749\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,9]]},"references-count":39,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2026.3650860","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,9]]}}}