{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,29]],"date-time":"2026-03-29T09:10:34Z","timestamp":1774775434190,"version":"3.50.1"},"reference-count":52,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2024,12,1]],"date-time":"2024-12-01T00:00:00Z","timestamp":1733011200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,12,1]],"date-time":"2024-12-01T00:00:00Z","timestamp":1733011200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,12,1]],"date-time":"2024-12-01T00:00:00Z","timestamp":1733011200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,12,1]],"date-time":"2024-12-01T00:00:00Z","timestamp":1733011200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["1937599"],"award-info":[{"award-number":["1937599"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["2119643"],"award-info":[{"award-number":["2119643"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["2303037"],"award-info":[{"award-number":["2303037"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. Artif. Intel."],"published-print":{"date-parts":[[2024,12]]},"DOI":"10.1109\/tcasai.2024.3485522","type":"journal-article","created":{"date-parts":[[2024,10,24]],"date-time":"2024-10-24T17:25:09Z","timestamp":1729790709000},"page":"114-127","source":"Crossref","is-referenced-by-count":2,"title":["Harnessing GNNs for Robust Representation Learning in High-Level Synthesis"],"prefix":"10.1109","volume":"1","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1156-3306","authenticated-orcid":false,"given":"Atefeh","family":"Sohrabizadeh","sequence":"first","affiliation":[{"name":"Computer Science Department, University of California–Los Angeles, Los Angeles, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1623-6184","authenticated-orcid":false,"given":"Yunsheng","family":"Bai","sequence":"additional","affiliation":[{"name":"Computer Science Department, University of California–Los Angeles, Los Angeles, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1812-6843","authenticated-orcid":false,"given":"Yizhou","family":"Sun","sequence":"additional","affiliation":[{"name":"Computer Science Department, University of California–Los Angeles, Los Angeles, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2887-6963","authenticated-orcid":false,"given":"Jason","family":"Cong","sequence":"additional","affiliation":[{"name":"Computer Science Department, University of California–Los Angeles, Los Angeles, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1515\/cclm.1993.31.5.335"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045178"},{"key":"ref3","article-title":"AMD\/Xilinx SDAccel -"},{"key":"ref4","article-title":"AMD\/Xilinx Vitis HLS"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530629"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3524108"},{"key":"ref7","article-title":"Fast and accurate deep network learning by exponential linear units","author":"Clevert"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-26408-0_8"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3530775"},{"key":"ref10","first-page":"2244","article-title":"ProGraML: A graph-based program representation for data flow analysis and compiler optimizations","author":"Cummins","year":"2021","journal-title":"Proc. Int. Conf. Mach. Learn. (PMLR)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050511"},{"key":"ref12","first-page":"1","article-title":"Efficient task transfer for HLS DSE","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Des. (ICCAD)","author":"Ding","year":"2024"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530597"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1126\/science.1127647"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643582"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3451179"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.2307\/2332226"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430690"},{"key":"ref19","article-title":"Adam: A method for stochastic optimization","author":"Kingma"},{"key":"ref20","article-title":"Semi-supervised classification with graph convolutional networks","author":"Kipf"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2019.8920342"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530453"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v32i1.11604"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1126\/science.abq1158"},{"key":"ref26","article-title":"Gated graph sequence neural networks","author":"Li"},{"key":"ref27","first-page":"1","article-title":"On learning-based methods for design-space exploration with high-level synthesis","author":"Liu","year":"2013","journal-title":"Proc. 50th Annu. Des. Automat. Conf. (DAC)"},{"key":"ref28","first-page":"6","article-title":"VLSI placement optimization using graph neural networks","author":"Lu","year":"2020","journal-title":"Proc. 34th Adv. Neural Inf. Process. Syst. (NeurIPS) Workshop Mach. Learn. Syst., Virtual"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3372780.3378173"},{"issue":"Nov","key":"ref30","first-page":"2579","article-title":"Visualizing data using t-SNE","volume":"9","author":"Maaten","year":"2008","journal-title":"J. Mach. Learn. Res."},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-021-03544-w"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942145"},{"key":"ref33","article-title":"OpenAI: Introducing ChatGPT"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.5555\/3454287.3455008"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983050"},{"key":"ref36","first-page":"1","article-title":"Why are graph neural networks effective for EDA problems?","author":"Ren","year":"2022","journal-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Des. (ICCAD)"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2943570"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.24963\/ijcai.2021\/214"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530409"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323853"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3373087.3375321"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3494534"},{"key":"ref43","first-page":"1","article-title":"Accurate operation delay prediction for FPGA HLS using graph neural networks","author":"Ustun","year":"2020","journal-title":"Proc. 39th Int. Conf. Comput. Aided Des. (ICCAD)"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218674"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3185540"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530408"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2020.2978386"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240843"},{"key":"ref49","first-page":"5453","article-title":"Representation learning on graphs with jumping knowledge networks","author":"Xu","year":"2018","journal-title":"Proc. Int. Conf. Mach. Learn. (PMLR)"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465913"},{"key":"ref51","article-title":"PolyBench\/C","author":"Yuki"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3004555"}],"container-title":["IEEE Transactions on Circuits and Systems for Artificial Intelligence"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/10495160\/10768861\/10734257-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10495160\/10768861\/10734257.pdf?arnumber=10734257","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T19:32:16Z","timestamp":1732735936000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10734257\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,12]]},"references-count":52,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcasai.2024.3485522","relation":{},"ISSN":["2996-6647"],"issn-type":[{"value":"2996-6647","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,12]]}}}