{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,27]],"date-time":"2025-11-27T10:38:47Z","timestamp":1764239927069},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Consumer Electron."],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/tce.2015.7150599","type":"journal-article","created":{"date-parts":[[2015,7,8]],"date-time":"2015-07-08T18:25:30Z","timestamp":1436379930000},"page":"236-244","source":"Crossref","is-referenced-by-count":12,"title":["A multicore DSP HEVC decoder using an actorbased dataflow model and OpenMP"],"prefix":"10.1109","volume":"61","author":[{"given":"M.","family":"Chavarr\u00edas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Pescador","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. J.","family":"Garrido","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Ju\u00e1rez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C.","family":"Sanz","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2013.6689697"},{"key":"ref10","article-title":"Infrastructure de compilation pour des programmes flux de donn&#x00E9;es","author":"wipliez","year":"2010","journal-title":"INSA Rennes"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-010-0169-2"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1155\/2012\/484962"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCE.2013.6486822"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2011.5955211"},{"key":"ref15","year":"2013","journal-title":"The OpenMP API specification for parallel programming Version 4 0"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2009.082224"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2010.5506043"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2013.2280796"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSTARS.2014.2304832"},{"key":"ref28","article-title":"Open RVC-CAL Compiler","year":"2013","journal-title":"Cudd release 2 3 0"},{"key":"ref4","year":"2012","journal-title":"Samsung Exynos 4 Dual 32nm (Exynos 4212) Revision 1 0"},{"key":"ref27","article-title":"Open RVC-CAL Applications open source repository","year":"2013","journal-title":"Github"},{"key":"ref3","article-title":"Intel Core i pp.7&#x2013;900 Desktop Processor Extreme Edition Series and Intel Core i7 ?900","year":"2013","journal-title":"Desktop Processor Series Datasheet"},{"key":"ref6","article-title":"Multicore DSP+ARM KeyStone II System-on-Chip (SoC). SPRS866E-November2012","year":"2013"},{"key":"ref29","article-title":"BIOS Multicore Software Development Kit 2.1","year":"2013","journal-title":"Getting Started Guide"},{"key":"ref5","article-title":"TMS320C6678 Multicore fixed and floating point Digital Signal Processor. SPRS691E November","year":"2010"},{"key":"ref8","article-title":"ISO\/IEC pp. 23001&#x2013;4, MPEG systems technologies - Part 4: CodecConfiguration Representation","year":"2011"},{"key":"ref7","article-title":"NVIDIA TESLA GPU Accelerators","year":"2013","journal-title":"DHP Family Datasheets"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2223013"},{"key":"ref1","article-title":"ISO\/IEC pp. 23008&#x2013;2. Information technology. High efficiency coding and media delivery in heterogeneous environments","year":"2013","journal-title":"Part 2 High efficiency video coding"},{"key":"ref9","year":"2010","journal-title":"ISO\/IEC pp 23002&#x2013;4 Information technology - MPEG video technologies - Part 4 Video tool library"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICSESS.2014.6933715"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/EDERC.2014.6924356"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MECO.2014.6862688"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCE.2015.7066449"},{"key":"ref23","first-page":"179","article-title":"Level-3 BLAS on the TI C6678 multi-core DSP","author":"ali","year":"2014","journal-title":"International Symposium on Computer Architecture and High Performance Computing"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221191"},{"key":"ref25","year":"2011","journal-title":"TMDSEVM6678L EVM Technical Reference Manual Version 1 0 Advantech"}],"container-title":["IEEE Transactions on Consumer Electronics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/30\/7150561\/07150599.pdf?arnumber=7150599","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:02:07Z","timestamp":1642003327000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7150599\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":30,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tce.2015.7150599","relation":{},"ISSN":["0098-3063"],"issn-type":[{"value":"0098-3063","type":"print"}],"subject":[],"published":{"date-parts":[[2015,5]]}}}