{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T07:34:51Z","timestamp":1771572891643,"version":"3.50.1"},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100003329","name":"Ministerio de Econom\u00eda y Competitividad","doi-asserted-by":"publisher","award":["TEC2016-75981-C2-2-R"],"award-info":[{"award-number":["TEC2016-75981-C2-2-R"]}],"id":[{"id":"10.13039\/501100003329","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Consumer Electron."],"published-print":{"date-parts":[[2019,8]]},"DOI":"10.1109\/tce.2019.2913327","type":"journal-article","created":{"date-parts":[[2019,4,25]],"date-time":"2019-04-25T20:30:20Z","timestamp":1556224220000},"page":"274-283","source":"Crossref","is-referenced-by-count":40,"title":["A 2-D Multiple Transform Processor for the Versatile Video Coding Standard"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1466-6041","authenticated-orcid":false,"given":"Matias J.","family":"Garrido","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3610-4296","authenticated-orcid":false,"given":"Fernando","family":"Pescador","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0280-3440","authenticated-orcid":false,"given":"M.","family":"Chavarrias","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4416-5985","authenticated-orcid":false,"given":"P. J.","family":"Lobo","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2411-9132","authenticated-orcid":false,"given":"Cesar","family":"Sanz","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"britanak","year":"2016","journal-title":"Discrete Cosine and Sine Transforms General Properties Fast Algorithms and Integer Approximations"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221191"},{"key":"ref12","year":"2016","journal-title":"Cyclone v Device Overview"},{"key":"ref13","year":"2017","journal-title":"Zynq-7000 All Programmable SoC Data Sheet Overview"},{"key":"ref14","year":"2017","journal-title":"Intel Arria 10 Device Overview"},{"key":"ref15","year":"2017","journal-title":"Stratix 10 GX\/SX Device Overview"},{"key":"ref16","year":"2017","journal-title":"Ultrascale Architecture and Product Data Sheet Data Sheet Overview"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ECBS.2004.1316719"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICDSP.2013.6622742"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2016.12.024"},{"key":"ref4","year":"2017","journal-title":"Joint Call for Proposals on Video Compression With Capability Beyond HEVC"},{"key":"ref27","author":"scoville","year":"2019","journal-title":"Fitter Algorithms Seeds and Variation The SPICE of Life"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2013.6531122"},{"key":"ref6","year":"2018","journal-title":"Algorithm Description for Versatile Video Coding and Test Model 2 (VTM 2)"},{"key":"ref5","year":"2018","journal-title":"Versatile Video Coding (Draft 2)"},{"key":"ref8","year":"2019","journal-title":"AVT_Dev Branch"},{"key":"ref7","year":"2019","journal-title":"VVC VTM Reference Software"},{"key":"ref2","first-page":"1","article-title":"Versatile video coding&#x2014;Towards the next generation of video compression","author":"sullivan","year":"2018","journal-title":"Proc Picture Coding Symp"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221255"},{"key":"ref1","year":"2013","journal-title":"High Efficiency Video Coding"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2017.014862"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2018.2812459"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2018.2875528"},{"key":"ref24","year":"2019","journal-title":"ModelSim Functional Verification Tool Web"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/IEEESTD.2002.93614"},{"key":"ref26","year":"2019","journal-title":"Intel FPGA Download Center"},{"key":"ref25","year":"2018","journal-title":"JVET Common Test Conditions and Software Reference Configurations for SDR Video"}],"container-title":["IEEE Transactions on Consumer Electronics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/30\/8771265\/08698857.pdf?arnumber=8698857","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:48:24Z","timestamp":1657745304000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8698857\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8]]},"references-count":27,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tce.2019.2913327","relation":{},"ISSN":["0098-3063","1558-4127"],"issn-type":[{"value":"0098-3063","type":"print"},{"value":"1558-4127","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,8]]}}}