{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:51:39Z","timestamp":1774367499379,"version":"3.50.1"},"reference-count":40,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2011,8,1]],"date-time":"2011-08-01T00:00:00Z","timestamp":1312156800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2011,8]]},"DOI":"10.1109\/tcsi.2011.2107214","type":"journal-article","created":{"date-parts":[[2011,2,11]],"date-time":"2011-02-11T21:42:38Z","timestamp":1297460558000},"page":"1736-1748","source":"Crossref","is-referenced-by-count":205,"title":["Analysis of Power Consumption and Linearity in Capacitive Digital-to-Analog Converters Used in Successive Approximation ADCs"],"prefix":"10.1109","volume":"58","author":[{"given":"Mehdi","family":"Saberi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Reza","family":"Lotfi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Khalil","family":"Mafinezhad","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wouter A.","family":"Serdijn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","first-page":"460","article-title":"A 1-V, 10-bit rail-to- rail successive approximation analog-to-digital converter in standard 0.18 <formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m CMOS technology","author":"fayomi","year":"2001","journal-title":"Proc IEEE ISCAS"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.806257"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1981.1051564"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2006.381981"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1049\/el:20050490"},{"key":"ref30","first-page":"246","article-title":"A 65fJ\/conversion-step 0-to-50 MS\/s 0-to-0.7 mW 9b charge-sharing SAR ADC in 90 nm digital CMOS","author":"craninckx","year":"2007","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/4.705353"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/4.839925"},{"key":"ref35","first-page":"401","article-title":"Ultra low power current-mode algorithmic analog-to-digital converter implemented in 0.18 <formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>m CMOS technology for wireless sensor network","author":"dlugosz","year":"2006","journal-title":"Proc IEEE MIXDES"},{"key":"ref34","first-page":"224","article-title":"A 10-bit 8.3 MS\/s switch-current successive approximation ADC for column-parallel imagers","author":"yang","year":"2008","journal-title":"Proc IEEE ISCAS"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.905237"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051862"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2008.4616838"},{"key":"ref12","author":"baker","year":"2004","journal-title":"CMOS Circuit Design Layout and Simulation"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.880021"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048498"},{"key":"ref15","first-page":"642","article-title":"A power-efficient capacitor structure for high-speed charge recycling SAR ADCs","author":"zhu","year":"2008","journal-title":"Proc IEEE ICECS"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892169"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464555"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2008.4479747"},{"key":"ref19","first-page":"507","article-title":"A 1-V 60-<formula formulatype=\"inline\"> <tex Notation=\"TeX\">$\\mu$<\/tex><\/formula>W 16-channel interface chip for implantable neural recording","author":"liew","year":"2009","journal-title":"Proc IEEE CICC"},{"key":"ref28","first-page":"301","article-title":"A non-binary capacitor array calibration circuit with 22-bit accuracy in successive approximation analog-to-digital converters","volume":"1","author":"gan","year":"2002","journal-title":"Proc IEEE MWSCAS"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.879063"},{"key":"ref27","first-page":"1046","article-title":"Mixed-signal micro-controller for non-binary capacitor array calibration in data converter","volume":"2","author":"gan","year":"2002","journal-title":"Proc IEEE Signals Syst Computers Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914721"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897157"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050630"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.813296"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.813217"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.906210"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2010.2041350"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050630"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837027"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/82.974780"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/EDSSC.2008.4760721"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1049\/el:19990853"},{"key":"ref24","first-page":"236","article-title":"Capacitor array structure and switch control for energy-efficient SAR analog-to-digital converters","author":"lee","year":"2008","journal-title":"Proc IEEE ISCAS"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2009.5326008"},{"key":"ref26","first-page":"176","article-title":"A 1.2 V 10b 20 MSample\/s non-binary successive approximation ADC in 0.13 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex> <\/formula>m CMOS","author":"kuttner","year":"2002","journal-title":"Proc IEEE ISSCC"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1155\/2010\/706548"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8919\/5961791\/05711005.pdf?arnumber=5711005","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:52:50Z","timestamp":1633909970000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5711005\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,8]]},"references-count":40,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2011.2107214","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,8]]}}}