{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,29]],"date-time":"2026-10-29T16:12:06Z","timestamp":1793290326072,"version":"4.5.0"},"reference-count":40,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2015,2,1]],"date-time":"2015-02-01T00:00:00Z","timestamp":1422748800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2015,2]]},"DOI":"10.1109\/tcsi.2014.2360762","type":"journal-article","created":{"date-parts":[[2014,10,14]],"date-time":"2014-10-14T18:39:53Z","timestamp":1413311993000},"page":"366-375","source":"Crossref","is-referenced-by-count":38,"title":["A 0.8-V, 1-MS\/s, 10-bit SAR ADC for Multi-Channel Neural Recording"],"prefix":"10.1109","volume":"62","author":[{"given":"Yonghong","family":"Tao","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yong","family":"Lian","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","first-page":"280","article-title":"A 2.4-to-5.2 fJ\/conversion-step 10b 0.5-to-4 MS\/s SAR ADC with charge-average switching DAC in 90 nm CMOS","author":"liou","year":"2013","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref38","first-page":"244","article-title":"A 1.9 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm W}$<\/tex><\/ref_formula> 4.4 fJ\/conversion-step 10b 1 MS\/s charge-redistribution ADC","author":"elzakker","year":"2008","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2158255"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2230587"},{"key":"ref31","first-page":"176","article-title":"A 1.2 V 10b 20 MSample\/s non-binary successive approximation ADC in 0.13 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex> <\/ref_formula> CMOS","author":"kuttner","year":"2002","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464555"},{"key":"ref37","first-page":"377","article-title":"A 0.024 <ref_formula><tex Notation=\"TeX\">${\\rm mm}^{2}$<\/tex><\/ref_formula> 4.9 fJ 10-bit 2 MS\/s SAR ADC in 65 nm CMOS","author":"yin","year":"2012","journal-title":"Proc Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2009.5325932"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2107214"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2304890"},{"key":"ref10","first-page":"384","article-title":"A 10b 50 MS\/s 820 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm W}$<\/tex><\/ref_formula> SAR ADC with on-chip digital calibration","author":"yoshioka","year":"2010","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref40","first-page":"198","article-title":"A 10b 0.6 nW SAR ADC with data-dependent energy savings using LSB-first successive approximation","author":"yaul","year":"2014","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2198350"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/4.62175"},{"key":"ref13","first-page":"380","article-title":"A 12b 22.5\/45 MS\/s 3.0 mW 0.059 mm CMOS SAR ADC achieving over 90 dB SFDR","author":"liu","year":"2010","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2042254"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048498"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897157"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746277"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2143870"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.811979"},{"key":"ref28","author":"maloberti","year":"2001","journal-title":"Analog Design for CMOS VLSI Systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2174492"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/4.933473"},{"key":"ref3","first-page":"126","article-title":"A 1 V 22 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm W}$<\/tex><\/ref_formula> 32-channel implantable EEG recording IC","author":"zou","year":"2010","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2001877"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1979.1051264"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1109\/ESSCIRC.2011.6044946","article-title":"A 0.5-V 1.13- <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm W}$<\/tex><\/ref_formula>\/channel neural recording interface with digital multiplexing scheme","author":"liew","year":"2011","journal-title":"Proc Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185338"},{"key":"ref7","first-page":"146","article-title":"Biobolt: A minimally-invasive neural interface for wireless epidural recording by intra-skin communication","author":"sun-il","year":"2011","journal-title":"Proc IEEE Symp VLSI Circuits (VLSIC)"},{"key":"ref2","first-page":"146","article-title":"A 128-Channel 6 mW wireless neural recording IC with on-the-fly spike sorting and UWB transmitter","author":"chae","year":"2008","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref9","first-page":"1","article-title":"Three-dimensional metrology for CMP process evaluation with in-line wide-area atomic force microscope","author":"ken","year":"2007","journal-title":"Proc Int Conf Planarization\/CMP Technol (ICPT)"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"4572","DOI":"10.3390\/s110504572","article-title":"Recent advances in neural recording microsystems","volume":"11","author":"gosselin","year":"2011","journal-title":"Sensors (Basel)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/4.839925"},{"key":"ref22","first-page":"922","article-title":"Linearity analysis on a series-split capacitor array for high-speed SAR ADCs","author":"zhu","year":"2008","journal-title":"Proc IEEE Midwest Symp Circuits Syst"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.905237"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-1371-4"},{"key":"ref23","first-page":"246","article-title":"A 9.4-ENOB 1 V 3.8 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm W}$<\/tex><\/ref_formula> 100 kS\/s SAR ADC with time-domain comparator","author":"agnes","year":"2008","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977315"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.883204"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/7022009\/06923490.pdf?arnumber=6923490","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:05:17Z","timestamp":1642003517000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6923490\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,2]]},"references-count":40,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2014.2360762","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,2]]}}}