{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,31]],"date-time":"2025-05-31T05:07:00Z","timestamp":1748668020124},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2015]]},"DOI":"10.1109\/tcsi.2015.2388842","type":"journal-article","created":{"date-parts":[[2015,2,18]],"date-time":"2015-02-18T20:18:05Z","timestamp":1424290685000},"page":"1-8","source":"Crossref","is-referenced-by-count":3,"title":["Subquadratic Space-Complexity Digit-Serial Multipliers Over &lt;formula formulatype=\"inline\"&gt;&lt;tex Notation=\"TeX\"&gt;$GF(2^{m})$&lt;\/tex&gt; &lt;\/formula&gt; Using Generalized &lt;formula formulatype=\"inline\"&gt;&lt;tex Notation=\"TeX\"&gt;$(a,b)$&lt;\/tex&gt;&lt;\/formula&gt;-Way Karatsuba Algorithm"],"prefix":"10.1109","author":[{"given":"Chiou-Yng","family":"Lee","sequence":"first","affiliation":[]},{"given":"Pramod Kumar","family":"Meher","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"211","DOI":"10.1016\/j.vlsi.2012.03.001","article-title":"Low-power and high-speed design of a versatile bit-serial multiplier in finite fields <ref_formula> <tex Notation=\"TeX\">$GF(2^{m})$<\/tex><\/ref_formula>","volume":"46","author":"zakerolhosseini","year":"2013","journal-title":"Integration"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/j.compeleceng.2012.08.010"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.165"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.235"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-011-0654-2"},{"key":"ref15","author":"weimerskirch","year":"2003","journal-title":"?Generalizations of the Karatsuba Algorithm for Efficient Implementations ?"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.49"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.233"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"1169","DOI":"10.1109\/TC.2012.239","article-title":"Low-latency digit-serial systolic double basis multiplier over <ref_formula><tex Notation=\"TeX\">$GF(2^{m})$<\/tex> <\/ref_formula> using subquadratic Toeplitz matrix-vector product approach","volume":"63","author":"pan","year":"2014","journal-title":"IEEE Trans Comput"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2376091"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/j.cose.2004.09.012"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-17455-1_25"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"1061","DOI":"10.1109\/TC.2005.147","article-title":"Low-complexity bit-parallel systolic montgomery multipliers for special classes of <ref_formula><tex Notation=\"TeX\">$GF(2^{m})$<\/tex> <\/ref_formula>","volume":"54","author":"lee","year":"2005","journal-title":"IEEE Trans Comput"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1093\/ietfec\/e91-a.6.1470"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.ipl.2011.01.005"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1016\/j.vlsi.2011.12.006","article-title":"Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials","volume":"46","author":"ima\ufffda","year":"2013","journal-title":"Integration"},{"key":"ref2","year":"2013","journal-title":"Digital signature standard"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2335031"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"1234","DOI":"10.1109\/TVLSI.2009.2020593","article-title":"Concurrent error detection in bit-serial normal basis multiplication over <ref_formula><tex Notation=\"TeX\">$GF(2^{m})$<\/tex> <\/ref_formula> using multiple parity prediction schemes","volume":"18","author":"lee","year":"2010","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2334992"},{"key":"ref22","year":"0","journal-title":"NanGate Standard Cell Library"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1007\/978-3-540-69499-1_9","article-title":"Digit-serial structures for the shifted polynomial basis multiplication over binary extension fields","volume":"5130","author":"hariri","year":"2008","journal-title":"Proc LNCS Int Arith Finite Fields (WAIFI)"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/7070848\/07044608.pdf?arnumber=7044608","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:47:33Z","timestamp":1642006053000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7044608\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/tcsi.2015.2388842","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015]]}}}