{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T12:04:45Z","timestamp":1740139485044,"version":"3.37.3"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Grants-in-Aid for Scientific Research"},{"DOI":"10.13039\/501100001691","name":"The Japan Society for the Promotion of Science","doi-asserted-by":"crossref","id":[{"id":"10.13039\/501100001691","id-type":"DOI","asserted-by":"crossref"}]},{"name":"VLSI Design and Education Center (VDEC)"},{"DOI":"10.13039\/501100004721","name":"University of Tokyo","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004721","id-type":"DOI","asserted-by":"publisher"}]},{"name":"CADENCE and SYNOPSYS Corporations"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/tcsi.2015.2416812","type":"journal-article","created":{"date-parts":[[2015,4,28]],"date-time":"2015-04-28T14:46:22Z","timestamp":1430232382000},"page":"1288-1295","source":"Crossref","is-referenced-by-count":8,"title":["A Multi-Rate Burst-Mode CDR Using a GVCO With Symmetric Loops for Instantaneous Phase Locking in 65-nm CMOS"],"prefix":"10.1109","volume":"62","author":[{"given":"Keiji","family":"Kishine","sequence":"first","affiliation":[]},{"given":"Hiromi","family":"Inaba","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Inoue","sequence":"additional","affiliation":[]},{"given":"Makoto","family":"Nakamura","sequence":"additional","affiliation":[]},{"given":"Akira","family":"Tsuchiya","sequence":"additional","affiliation":[]},{"given":"Hiroaki","family":"Katsurai","sequence":"additional","affiliation":[]},{"given":"Hidetoshi","family":"Onodera","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.872705"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2006.357938"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1364\/ECOC.2011.We.8.C.4"},{"key":"ref13","first-page":"365","article-title":"Improving the accession time of a PLL-based integer-N frequency synthesizer","volume":"4","author":"ahmed","year":"2004","journal-title":"Proc IEEE ISCAS"},{"key":"ref14","first-page":"457","article-title":"A 2.5 Gbps burst-mode clock and data recovery circuit","author":"liang","year":"2007","journal-title":"IEEE ASSCC Dig Tech Papers"},{"key":"ref15","first-page":"224","article-title":"20\/10\/5\/2.5 Gb\/s power-scaling burst-mode CDR circuit using GVCO\/Div2\/DFF tri-mode cells","author":"liang","year":"2008","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373581"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2009.5118151"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.916598"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1117\/12.772469"},{"key":"ref4","first-page":"362","article-title":"System architecture for 100 Gb\/s ethernet; System elements, partition and issues related to 100 gigabit\/second Ethernet","author":"barrass","year":"2007","journal-title":"Proc IEEE LEOS Annu Meet"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.2004.1273776"},{"key":"ref6","first-page":"254","article-title":"A 10 Gb\/s CDR\/DEMUX with LC delay line VCO in 0.18 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/ref_formula> CMOS","author":"rogers","year":"2002","journal-title":"IEEE ISSCC Dig Tech Papers"},{"journal-title":"Media Access Control (MAC) Parameters Physical Layers and Management Parameters for 10 Gb\/s Operation","year":"0","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856575"},{"key":"ref7","first-page":"76","article-title":"A 2.5 Gb\/s?10 Gb\/s CMOS transceiver with alternating edge sampling phase detection for loop characteristic stabilization","author":"lee","year":"2003","journal-title":"IEEE ISSCC Dig Tech Papers"},{"journal-title":"?Interfaces of the optical transport network ?","year":"0","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007439"},{"journal-title":"?Types and characteristics of SDH network protection architectures ?","year":"0","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/50.350582"},{"key":"ref22","first-page":"228","article-title":"A 10 Gb\/s burst-mode CDR IC in 0.13 <ref_formula> <tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/ref_formula> CMOS","author":"nogawa","year":"2005","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.884120"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/4.766813"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"841","DOI":"10.1109\/4.509871","article-title":"Performance of CMOS differential circuits","volume":"31","author":"pius","year":"1996","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/4.585289"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/7097101\/07097115.pdf?arnumber=7097115","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:48:01Z","timestamp":1641988081000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7097115\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":25,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2015.2416812","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2015,5]]}}}