{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T15:21:33Z","timestamp":1772119293941,"version":"3.50.1"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2016,5,1]],"date-time":"2016-05-01T00:00:00Z","timestamp":1462060800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Research Grant Council of Hong Kong SAR Government, China","award":["16207014"],"award-info":[{"award-number":["16207014"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/tcsi.2016.2556098","type":"journal-article","created":{"date-parts":[[2016,5,12]],"date-time":"2016-05-12T18:12:10Z","timestamp":1463076730000},"page":"671-682","source":"Crossref","is-referenced-by-count":104,"title":["Analysis and Design Considerations of Integrated 3-Level Buck Converters"],"prefix":"10.1109","volume":"63","author":[{"given":"Xun","family":"Liu","sequence":"first","affiliation":[]},{"given":"Philip K. T.","family":"Mok","sequence":"additional","affiliation":[]},{"given":"Junmin","family":"Jiang","sequence":"additional","affiliation":[]},{"given":"Wing-Hung","family":"Ki","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2012.2216291"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.927218"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.907676"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2000.839851"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1002\/9781119081371"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/41.585833"},{"key":"ref16","article-title":"Fixed frequency control laws for multicell chopper","author":"fadel","year":"0","journal-title":"Proc Eur Conf Power Electron Appl"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-8843-0"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/81.678481"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169091"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757441"},{"key":"ref3","first-page":"342c","article-title":"86.55% Peak efficiency envelope modulator for 1.5 W 10 MHz LTE PA without AC coupling capacitor","author":"sung","year":"0","journal-title":"Proc IEEE Symp VLJSI Circuits"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/PESC.2008.4592620"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2169309"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.853911"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2002.803174"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2005.869728"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2006.880351"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/PESC.1992.254717"},{"key":"ref20","first-page":"14","year":"2009","journal-title":"“UMC 65 nm LOGIC and MIXED_MODE low leakage 2 5 V IO MOSFET SPICE model document ”"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2274826"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063078"},{"key":"ref24","article-title":"A 50 MHz 5 V 3 W 90% efficiency 3-level buck converter with real-time calibration and wide output range for fast-DVS in 65 nm CMOS","author":"liu","year":"0","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref23","first-page":"226","article-title":"A 2 MHz 12-to-100 V 90%-efficiency self-balancing ZVS three-level DC-DC regulator with constant-frequency AOT V2 control and 5 ns ZVS turn-on delay","author":"xue","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref25","first-page":"940","article-title":"A CAD simulator based on loop gain measurement for switching converters","volume":"5","author":"ma","year":"0","journal-title":"Proc IEEE Int Symp Circuits Syst"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/7501624\/07469385.pdf?arnumber=7469385","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:43:24Z","timestamp":1642005804000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7469385\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":25,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2016.2556098","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,5]]}}}