{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T13:41:43Z","timestamp":1774964503774,"version":"3.50.1"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2016,8,1]],"date-time":"2016-08-01T00:00:00Z","timestamp":1470009600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100003662","name":"Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology","doi-asserted-by":"publisher","award":["10052716"],"award-info":[{"award-number":["10052716"]}],"id":[{"id":"10.13039\/501100003662","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","award":["#2015M3D1A1070465"],"award-info":[{"award-number":["#2015M3D1A1070465"]}],"id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2016,8]]},"DOI":"10.1109\/tcsi.2016.2589118","type":"journal-article","created":{"date-parts":[[2016,7,28]],"date-time":"2016-07-28T14:16:38Z","timestamp":1469715398000},"page":"1164-1175","source":"Crossref","is-referenced-by-count":19,"title":["A Charge-Recycling Assist Technique for Reliable and Low Power SRAM Design"],"prefix":"10.1109","volume":"63","author":[{"given":"Woong","family":"Choi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3251-0024","authenticated-orcid":false,"given":"Jongsun","family":"Park","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681835"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2362842"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2388837"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"222","DOI":"10.1109\/JSSC.2015.2461592","article-title":"A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS technology with capacitive charge-sharing write assist circuitry","volume":"51","author":"karl","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2010.06.009"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2001941"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187551"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231015"},{"key":"ref18","first-page":"25.1.1","article-title":"The impact of assist-circuit design for 22 nm SRAM and beyond","author":"karl","year":"0","journal-title":"Proc IEDM"},{"key":"ref19","year":"0","journal-title":"Predictive Technology Model"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2213513"},{"key":"ref3","first-page":"32.1.1","article-title":"Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6 V 32 nm LP SRAM","author":"wang","year":"0","journal-title":"Proc IEDM"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2109434"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433815"},{"key":"ref8","first-page":"316","article-title":"A 20 nm 112 Mb SRAM in high- $\\kappa$ metal-gate with assist circuitry for low-leakage and low- ${V}_{\\mathrm{MIN}}$ applications","author":"chang","year":"0","journal-title":"Proc IEEE ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2029114"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077607"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859025"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2497558"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6606-3"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2185335"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.19"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2291091"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"},{"key":"ref25","first-page":"268c","article-title":"14 nm FinFET based supply voltage boosting techniques for extreme low Vmin operation","author":"joshi","year":"0","journal-title":"Proc Symp VLSI Circuits"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/7536673\/07524740.pdf?arnumber=7524740","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:43:18Z","timestamp":1641987798000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7524740\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,8]]},"references-count":25,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2016.2589118","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,8]]}}}