{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T17:39:06Z","timestamp":1778693946228,"version":"3.51.4"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/tcsi.2017.2705053","type":"journal-article","created":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T18:19:57Z","timestamp":1498155597000},"page":"2920-2933","source":"Crossref","is-referenced-by-count":48,"title":["Ultra-Sub-Threshold Operation of Always-On Digital Circuits for IoT Applications by Use of Schmitt Trigger Gates"],"prefix":"10.1109","volume":"64","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8021-1427","authenticated-orcid":false,"given":"Niklas","family":"Lotze","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yiannos","family":"Manoli","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/1165573.1165578"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2177004"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1972.1050260"},{"key":"ref32","author":"henzler","year":"2007","journal-title":"Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies"},{"key":"ref31","year":"2016","journal-title":"Berkeley predictive technology model"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2167777"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2011.5993598"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2005413"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(95)00171-9"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.873215"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2011972"},{"key":"ref40","volume":"2","author":"rabaey","year":"2002","journal-title":"Digital Integrated Circuits"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852162"},{"key":"ref12","first-page":"868","article-title":"Theoretical and practical limits of dynamic voltage scaling","author":"bo zhai","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JMEMS.2004.828740"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034441"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185589"},{"key":"ref16","first-page":"486","article-title":"A batteryless thermoelectric energy-harvesting interface circuit with 35 mV startup voltage","author":"ramadass","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2563782"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2233352"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831432"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810043"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MIC.2009.52"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917505"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2013.01.010"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2039684"},{"key":"ref29","first-page":"154","article-title":"A 85 mV 40 nW process-tolerant subthreshold \n$8\\times 8$\n FIR filter in 130 nm technology","author":"hwang","year":"2007","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref5","first-page":"9","article-title":"Internet of Things strategic research roadmap","volume":"1","author":"vermesan","year":"2011","journal-title":"Internet of Things Global Technological and Societal Trends"},{"key":"ref8","first-page":"318","article-title":"A 65 nm sub-Vt microcontroller with integrated SRAM and switched-capacitor DC-DC converter","author":"kwong","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","first-page":"328","article-title":"A 320 mV-to-1.2 V on-die fine-grained reconfigurable fabric for DSP\/media accelerators in 32 nm CMOS","author":"agarwal","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2342509.2342513"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2001903"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.adhoc.2012.02.016"},{"key":"ref20","first-page":"340","article-title":"A 62 mV 0.13 \n$\\mu$\nm CMOS standard-cell-based design technique using Schmitt-trigger logic","author":"lotze","year":"2011","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914720"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007160"},{"key":"ref42","first-page":"117","article-title":"Increasing minimum operating voltage (VDDmin) with number of CMOS logic gates and experimental verification with up to 1 Mega-stage ring oscillators","author":"niiyama","year":"2008","journal-title":"Proc ACM\/IEEE Int Symp Low Power Electron Design (ISLPED)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837945"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1995.482473"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2007.373206"},{"key":"ref25","first-page":"419","article-title":"A 135 mV 0.13 \n$\\mu $\nW process tolerant 6T subthreshold DTMOS SRAM in 90 nm technology","author":"hwang","year":"2008","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8082393\/07955001.pdf?arnumber=7955001","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:04:22Z","timestamp":1642003462000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7955001\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":42,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2017.2705053","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,11]]}}}