{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,28]],"date-time":"2026-07-28T15:09:44Z","timestamp":1785251384347,"version":"3.55.0"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001659","name":"German Research Foundation","doi-asserted-by":"publisher","award":["NE 1877\/1-2"],"award-info":[{"award-number":["NE 1877\/1-2"]}],"id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2018,1]]},"DOI":"10.1109\/tcsi.2017.2715899","type":"journal-article","created":{"date-parts":[[2017,6,29]],"date-time":"2017-06-29T19:51:18Z","timestamp":1498765878000},"page":"39-50","source":"Crossref","is-referenced-by-count":37,"title":["1.5\u20133.3 GHz, 0.0077 mm2, 7 mW All-Digital Delay-Locked Loop With Dead-Zone Free Phase Detector in $0.13~\\mu \\text{m}$ CMOS"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2530-0782","authenticated-orcid":false,"given":"Erkan","family":"Bayram","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ahmed Farouk","family":"Aref","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mohamed","family":"Saeed","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Renato","family":"Negra","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/4.16303"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.920088"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803048"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.810787"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.906183"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"412","DOI":"10.1109\/JSSC.2015.2494603","article-title":"A 6.7 MHz to 1.24 GHz 0.0318 mm2 fast-locking all-digital DLL using phase-tracing delay unit in 90 nm CMOS","volume":"51","author":"hsieh","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2313131"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2456111"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2466443"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2047994"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658530"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"1414","DOI":"10.1109\/JSSC.2002.803936","article-title":"a low-power small-area \/spl plusmn\/7.28-ps-jitter 1-ghz dll-based clock generator","volume":"37","author":"kim","year":"2002","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICM.2010.5696179"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2013.6573607"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2005.1496693"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.822890"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.859501"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.843596"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISICir.2011.6131978"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2423312"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2468911"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2364103"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2291052"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8248584\/07962188.pdf?arnumber=7962188","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:28:00Z","timestamp":1642004880000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7962188\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1]]},"references-count":23,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2017.2715899","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,1]]}}}