{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,30]],"date-time":"2025-10-30T07:08:56Z","timestamp":1761808136037,"version":"3.37.3"},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1543894","1617545"],"award-info":[{"award-number":["1543894","1617545"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tcsi.2017.2737986","type":"journal-article","created":{"date-parts":[[2017,8,25]],"date-time":"2017-08-25T18:44:01Z","timestamp":1503686641000},"page":"421-433","source":"Crossref","is-referenced-by-count":18,"title":["Adaptive Cancellation of Static and Dynamic Mismatch Error in Continuous-Time DACs"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2938-3087","authenticated-orcid":false,"given":"Derui","family":"Kong","sequence":"first","affiliation":[]},{"given":"Ian","family":"Galton","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2126410"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.918079"},{"journal-title":"Understanding Delta-Sigma Data Converters","year":"2005","author":"schreier","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/82.826744"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836230"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2601026"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.2001757"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2239113"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2042131"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511810817"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2301769"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2001931"},{"key":"ref6","first-page":"364","article-title":"A 200 MS\/s 14b 97 mW DAC in \n$0.18~\\mu $\nm CMOS","author":"huang","year":"2004","journal-title":"IEEE Int Solid State Circuits Conf Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234233"},{"key":"ref8","first-page":"250","article-title":"A 1.5 V 200MS\/s 13 b 25 mW DAC with randomized nested background calibration in \n$0.13~\\mu $\nm CMOS","author":"clara","year":"2007","journal-title":"IEEE Int Solid State Circuits Conf Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2006.1705307"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829923"},{"key":"ref1","first-page":"110","article-title":"A 1.2 GS\/s 15b DAC for precision signal generation","author":"jewett","year":"2005","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref9","first-page":"262","article-title":"A 1.5 V 13 bit 130–300 MS\/s self-calibrated DAC with active output stage and 50 MHz signal bandwidth in 0.13 \n$\\mu$\nm CMOS","author":"clara","year":"2008","journal-title":"Proc Eur Solid-State Circuits Conf"},{"key":"ref20","first-page":"93","article-title":"A 12 bit 250 MS\/s 28 mW +70 dB SFDR DAC in \n$0.11~\\mu $\nm CMOS using controllable RZ window for wireless SoC integration","author":"kim","year":"2014","journal-title":"Proc IEEE Asian Solid-State Circuits Conf"},{"journal-title":"Multirate Systems and Filter Banks","year":"1993","author":"vaidyanathan","key":"ref21"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/8919\/8270698\/8016684-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8270698\/08016684.pdf?arnumber=8016684","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:51:36Z","timestamp":1649443896000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8016684\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":21,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2017.2737986","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}