{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T12:05:21Z","timestamp":1740139521950,"version":"3.37.3"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2018,4,1]],"date-time":"2018-04-01T00:00:00Z","timestamp":1522540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"U.S.\u2013Israel Binational Science Foundation","award":["2012169"],"award-info":[{"award-number":["2012169"]}]},{"DOI":"10.13039\/501100003973","name":"Israel Science Foundation founded by the Israel Academy of Sciences and Humanities","doi-asserted-by":"publisher","award":["533\/15"],"award-info":[{"award-number":["533\/15"]}],"id":[{"id":"10.13039\/501100003973","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2018,4]]},"DOI":"10.1109\/tcsi.2017.2743045","type":"journal-article","created":{"date-parts":[[2017,9,1]],"date-time":"2017-09-01T18:22:40Z","timestamp":1504290160000},"page":"1224-1233","source":"Crossref","is-referenced-by-count":1,"title":["A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory"],"prefix":"10.1109","volume":"65","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2538-3103","authenticated-orcid":false,"given":"Anatoli","family":"Mordakhay","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yevgeniy","family":"Telepinsky","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lior","family":"Klein","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Joseph","family":"Shor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Fish","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref30","first-page":"314","article-title":"A double-tail latch-type voltage sense amplifier with 18 ps setup+hold time","author":"schinkel","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.800953"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2008.4479829"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2013.6662323"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IranianCEE.2014.6999534"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2010.5774848"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2011.6043288"},{"key":"ref16","first-page":"6134","article-title":"A \n$0.35~\\mu $\nm CMOS comparator circuit for high-speed ADC applications","volume":"6","author":"sheikhaei","year":"2005","journal-title":"Proc ISCAS"},{"key":"ref17","first-page":"1","article-title":"A 125 MS\/s self-latch lowpower comparator in \n$0.35~\\mu $\nm CMOS process","author":"rezaeii","year":"2013","journal-title":"Proc 21st Iranian Conf Elect Eng (ICEE)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/IWASID.2007.373688"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865646"},{"key":"ref28","first-page":"119","article-title":"A 800 MS\/s, \n$150~\\mu $\nV input-referred offset single-stage latched comparator","author":"kazeminia","year":"2016","journal-title":"Proc Int Conf Mixed Design Integr Circuits Syst (MIXDES'06)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1063\/1.2712053"},{"key":"ref27","first-page":"320","article-title":"A low-power 4 GHz comparator in 120 nm CMOS technology with a technique to tune resolution","author":"goll","year":"2006","journal-title":"Proc 32nd Eur Solid-State Circuits Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1063\/1.2162824"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1063\/1.4942445"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/82.917784"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1063\/1.3677885"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/5.542410"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FTFC.2014.6828598"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2003.811804"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref1","first-page":"377","article-title":"Future memory technology including emerging new memories","volume":"1","author":"koh","year":"2004","journal-title":"Proc 24th Int Conf Microelectron"},{"key":"ref20","first-page":"246","article-title":"An average low offset comparator for 1.25 Gsample\/s ADC in \n$0.18~\\mu $\nm CMOS","author":"stefanou","year":"2004","journal-title":"Proc IEEE Int Conf Electronics Circuits Syst (ICECS)"},{"key":"ref22","first-page":"233","article-title":"A reconfigurable low-noise dynamic comparator with offset calibration in 90 nm CMOS","author":"chan","year":"2011","journal-title":"Proc IEEE Asian Solid-State Circuit Conf (A-SSCC)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2009.5357221"},{"key":"ref24","first-page":"408","article-title":"A clocked, regenerative comparator in \n$0.12~\\mu $\nm CMOS with tunable sensitivity","author":"goll","year":"2007","journal-title":"Proc 33rd Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2008.4708780"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2239175"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2010.5774892"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8314245\/08024077.pdf?arnumber=8024077","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:25:47Z","timestamp":1642004747000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8024077\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,4]]},"references-count":30,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2017.2743045","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2018,4]]}}}