{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,6]],"date-time":"2025-10-06T09:28:59Z","timestamp":1759742939824,"version":"3.37.3"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,1]]},"DOI":"10.1109\/tcsi.2018.2861463","type":"journal-article","created":{"date-parts":[[2018,8,27]],"date-time":"2018-08-27T23:30:57Z","timestamp":1535412657000},"page":"263-273","source":"Crossref","is-referenced-by-count":24,"title":["Overhead Requirements for Stateful Memristor Logic"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7337-6637","authenticated-orcid":false,"given":"Xuan","family":"Hu","sequence":"first","affiliation":[]},{"given":"Michael J.","family":"Schultis","sequence":"additional","affiliation":[]},{"given":"Matthew","family":"Kramer","sequence":"additional","affiliation":[]},{"given":"Archit","family":"Bagla","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5893-9876","authenticated-orcid":false,"given":"Akshay","family":"Shetty","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9847-4455","authenticated-orcid":false,"given":"Joseph S.","family":"Friedman","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2357292"},{"key":"ref38","first-page":"1","article-title":"MRL&#x2014;Memristor ratioed logic","author":"kvatinsky","year":"2012","journal-title":"Proc Int Workshop Cell Nanoscale Netw Their Appl"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms2784"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1021\/nl901874j"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2010.2049092"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/PATMOS.2017.8106959"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2433311"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074005"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2441752"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2015.29"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms15635"},{"key":"ref40","doi-asserted-by":"crossref","first-page":"403","DOI":"10.1038\/nmat2748","article-title":"Complementary resistive switches for passive nanocrossbar memories","volume":"9","author":"linn","year":"2010","journal-title":"Nature Mater"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2512818"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2005.851427"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"526","DOI":"10.1038\/nature12502","article-title":"Carbon nanotube computer","volume":"501","author":"shulaker","year":"2013","journal-title":"Nature"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2085250"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1126\/science.1136907"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/49\/6\/065008"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2726544"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2282132"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"873","DOI":"10.1038\/nature08940","article-title":"&#x2018;Memristive&#x2019; switches enable &#x2018;stateful&#x2019; logic operations via material implication","volume":"464","author":"borghetti","year":"2010","journal-title":"Nature"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2012.240"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevApplied.2.044001"},{"key":"ref27","doi-asserted-by":"crossref","first-page":"1165","DOI":"10.1007\/s00339-004-3149-1","article-title":"Computing with hysteretic resistor crossbars","volume":"80","author":"snider","year":"2005","journal-title":"Appl Phys A Solids Surf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1088\/0953-8984\/23\/49\/493202"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1126\/science.1108813"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2013.6620207"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2015.2398231"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LMAG.2012.2188621"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1126\/science.1120506"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1143\/APEX.1.091301"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2014.2306395"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.915374"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1002\/adfm.201600680"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ICSEE.2016.7806045"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2433536"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"80","DOI":"10.1038\/nature06932","article-title":"The missing memristor found","volume":"453","author":"strukov","year":"2008","journal-title":"Nature"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/23\/30\/305205"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2423001"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2127439"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2422999"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2606433"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2158253"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2551554"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2009.5226356"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8566198\/08447423.pdf?arnumber=8447423","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:10:25Z","timestamp":1657746625000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8447423\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,1]]},"references-count":46,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2018.2861463","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2019,1]]}}}