{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T14:10:14Z","timestamp":1774966214470,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,3,1]],"date-time":"2019-03-01T00:00:00Z","timestamp":1551398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100005799","name":"National Chiao Tung University","doi-asserted-by":"publisher","award":["107-2 22-8-009-014-TA"],"award-info":[{"award-number":["107-2 22-8-009-014-TA"]}],"id":[{"id":"10.13039\/501100005799","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,3]]},"DOI":"10.1109\/tcsi.2018.2875311","type":"journal-article","created":{"date-parts":[[2018,11,9]],"date-time":"2018-11-09T22:08:58Z","timestamp":1541801338000},"page":"1219-1230","source":"Crossref","is-referenced-by-count":30,"title":["A (21150, 19050) GC-LDPC Decoder for NAND Flash Applications"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3575-3657","authenticated-orcid":false,"given":"Yen-Chin","family":"Liao","sequence":"first","affiliation":[]},{"given":"Chien","family":"Lin","sequence":"additional","affiliation":[]},{"given":"Hsie-Chia","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Shu","family":"Lin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","article-title":"Toward more accurate scaling estimates of CMOS circuits from 180 nm to 22 nm","author":"stillmaker","year":"2011"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/40.782564"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.894409"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2010.091710.090721"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2017.02.002"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/el:19961141"},{"key":"ref11","year":"2017"},{"key":"ref12","author":"mecheloni","year":"2010","journal-title":"Error Control Coding Fundamentals and Applications"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1981.1056404"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/18.910578"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511803253"},{"key":"ref16","article-title":"LDPC decoding: VLSI architectures and implementations","author":"gunnam","year":"2013","journal-title":"Flash Memory Summit"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2011.6026357"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2265314"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2464092"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2009.5325933"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939070"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817545"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2694613"},{"key":"ref6","author":"lin","year":"2004","journal-title":"Error Control Coding Fundamentals and Applications"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2004.831841"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2017.7939077"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(60)90287-4"},{"key":"ref7","first-page":"147","author":"hocquenghem","year":"1959","journal-title":"Codes Correcteurs d&#x2019;erreurs"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2016.2584602"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/4347.001.0001","author":"gallager","year":"1963","journal-title":"Low-Density Parity-Check Codes"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-9431-5"},{"key":"ref20","doi-asserted-by":"crossref","DOI":"10.1017\/9781316780152","author":"li","year":"2016","journal-title":"LDPC Code Designs Constructions and Unification"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2017.8006554"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ITA.2017.8023442"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/26.768759"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ITA.2016.7888167"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2004.841982"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/4234.1001666"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8635013\/08528505.pdf?arnumber=8528505","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,9,5]],"date-time":"2022-09-05T18:41:03Z","timestamp":1662403263000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8528505\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,3]]},"references-count":34,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2018.2875311","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,3]]}}}