{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T17:39:01Z","timestamp":1778693941814,"version":"3.51.4"},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.1109\/tcsi.2018.2889779","type":"journal-article","created":{"date-parts":[[2019,1,10]],"date-time":"2019-01-10T19:52:51Z","timestamp":1547149971000},"page":"2240-2252","source":"Crossref","is-referenced-by-count":31,"title":["A 2.86-TOPS\/W Current Mirror Cross-Bar-Based Machine-Learning and Physical Unclonable Function Engine For Internet-of-Things Applications"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4416-554X","authenticated-orcid":false,"given":"Yi","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2855-9570","authenticated-orcid":false,"given":"Zheng","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aakash","family":"Patil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1035-8770","authenticated-orcid":false,"given":"Arindam","family":"Basu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1201\/b16918"},{"key":"ref32","author":"rukhin","year":"2001","journal-title":"A Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications"},{"key":"ref31","article-title":"The Marsaglia random number CDROM including the diehard battery of tests of randomness","author":"marsaglia","year":"1995"},{"key":"ref30","first-page":"50c","article-title":"A 640 M pixel\/s 3.65 mW sparse event-driven neuromorphic object recognition processor with on-chip learning","volume":"4","author":"kim","year":"2015","journal-title":"IEEE Symp VLSI Circuits Dig Tech Papers"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2300173"},{"key":"ref36","first-page":"1313","article-title":"Weighted sums of random kitchen sinks: Replacing minimization with randomization in learning","author":"rahimi","year":"2008","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref35","author":"rasul","year":"2017","journal-title":"Fashion MNIST"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993612"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2290845"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2586498"},{"key":"ref12","first-page":"254","article-title":"A physically unclonable function with BER < 10?8 for robust chip authentication using oscillator collapse in 40 nm CMOS","volume":"58","author":"yang","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref13","first-page":"246","article-title":"Envision: A 0.26-to-10 TOPS\/W subword-parallel dynamic-voltage-accuracy-frequency-scalable convolutional neural network processor in 28 nm FDSOI","volume":"60","author":"moons","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2743004"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TSMCB.2011.2168604"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/BIOCAS.2017.8325073"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2015.2483618"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2018.2816339"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1162\/089976602760407955"},{"key":"ref28","author":"lecun","year":"2010","journal-title":"MNIST Handwritten Digit Database"},{"key":"ref4","first-page":"1","article-title":"ImageNet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2120650"},{"key":"ref3","author":"simonyan","year":"2014","journal-title":"Very Deep Convolutional Networks for Large-scale Image Recognition"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2599536"},{"key":"ref29","first-page":"249","article-title":"Sub-microwatt analog VLSI support vector machine for pattern classification and sequence estimation","author":"chakrabartty","year":"2005","journal-title":"Proc Adv Neural Inf Process Syst"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2356197"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SOCA.2014.58"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/I2MTC.2018.8409577"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2013.2245664"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2017.8240262"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1126\/science.1225266"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2016.09.118"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169319"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/BioCAS.2015.7348411"},{"key":"ref23","first-page":"2","article-title":"A 45 nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons","author":"seo","year":"2011","journal-title":"Proc Custom Integr Circuits Conf"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2476318"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050476"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8715688\/08608007.pdf?arnumber=8608007","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:13:40Z","timestamp":1657746820000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8608007\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6]]},"references-count":37,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2018.2889779","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,6]]}}}