{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,20]],"date-time":"2025-12-20T22:32:50Z","timestamp":1766269970159,"version":"3.37.3"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001659","name":"Deutsche Forschungsgemeinschaft","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/tcsi.2019.2898006","type":"journal-article","created":{"date-parts":[[2019,3,12]],"date-time":"2019-03-12T22:33:30Z","timestamp":1552430010000},"page":"2671-2684","source":"Crossref","is-referenced-by-count":18,"title":["Modeling and Mitigating Time-Dependent Variability From the Physical Level to the Circuit Level"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6629-4713","authenticated-orcid":false,"given":"Victor M.","family":"van Santen","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5649-3102","authenticated-orcid":false,"given":"Hussam","family":"Amrouch","sequence":"additional","affiliation":[]},{"given":"Jorg","family":"Henkel","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref30","DOI":"10.1109\/IRPS.2017.7936352"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/TVLSI.2009.2015455"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/ASPDAC.2014.6742929"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.23919\/DATE.2017.7927168"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ICICDT.2011.5783193"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/TDMR.2007.910437"},{"key":"ref15","first-page":"524","article-title":"Origin of NBTI variability in deeply scaled pFETs","volume":"7","author":"kaczer","year":"2007","journal-title":"Proc IRPS"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/ICCAD.2010.5654309"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/TDMR.2013.2237910"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/TED.2013.2238237"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1145\/2897937.2898082"},{"year":"2016","author":"asanovi?","article-title":"The rocket chip generator","key":"ref28"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/IRPS.2018.8353652"},{"doi-asserted-by":"publisher","key":"ref27","DOI":"10.1109\/TDMR.2019.2893017"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/IEDM.2011.6131494"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/IRPS.2015.7112725"},{"doi-asserted-by":"publisher","key":"ref29","DOI":"10.1109\/54.867894"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/TCSI.2017.2717790"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/IRPS.2011.5784604"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/IRPS.2014.6860643"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/IRPS.2011.5784605"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/MDT.2010.50"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/IRPS.2010.5488859"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1109\/IRPS.2016.7574590"},{"key":"ref22","first-page":"1","article-title":"Workload- and instruction-aware timing analysis&#x2014;The missing link between technology and system-level resilience","author":"kleeberger","year":"2014","journal-title":"Proc ACM\/EDAC\/IEEE 51st Design Autom Conf (DAC)"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/IRPS.2015.7112711"},{"year":"2011","journal-title":"Nangate open cell library","key":"ref24"},{"key":"ref23","first-page":"188","article-title":"Evaluation of the Intel core i7 turbo boost feature","author":"charles","year":"2009","journal-title":"Proc IEEE Int Symp Workload Characterization (IISWC)"},{"year":"2017","key":"ref26"},{"key":"ref25","first-page":"590-1","article-title":"New generation of predictive technology model for sub-45nm design exploration","author":"zhao","year":"2006","journal-title":"Proc ISQED"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8741038\/08666176.pdf?arnumber=8666176","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:43:21Z","timestamp":1657745001000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8666176\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":30,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2019.2898006","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2019,7]]}}}