{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T05:14:24Z","timestamp":1780636464817,"version":"3.54.1"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","award":["NSERC-RGPIN-205034-2012 052714"],"award-info":[{"award-number":["NSERC-RGPIN-205034-2012 052714"]}],"id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/tcsi.2019.2899314","type":"journal-article","created":{"date-parts":[[2019,3,5]],"date-time":"2019-03-05T21:14:22Z","timestamp":1551820462000},"page":"2519-2532","source":"Crossref","is-referenced-by-count":18,"title":["Hybrid Latch-Type Offset Tolerant Sense Amplifier for Low-Voltage SRAMs"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4282-5337","authenticated-orcid":false,"given":"Dhruv","family":"Patel","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5257-7694","authenticated-orcid":false,"given":"Adam","family":"Neale","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Derek","family":"Wright","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Manoj","family":"Sachdev","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672006"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2008.4479712"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1494081"},{"key":"ref14","article-title":"Dual sensing current latched sense amplifier","author":"chen","year":"2010"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2012.6419074"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2707392"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2015.2418155"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946003"},{"key":"ref19","first-page":"181","article-title":"A double-tail sense amplifier for low-voltage SRAM in 28 nm technology","author":"chiu","year":"2016","journal-title":"Proc IEEE Asian Solid-State Circuits Conf (A-SSCC)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829399"},{"key":"ref3","first-page":"1","article-title":"Comparative study of current mode and voltage mode sense amplifier used for 28 nm SRAM","author":"mohammad","year":"2012","journal-title":"Proc Int Conf Microelectron (ICM)"},{"key":"ref6","first-page":"1","article-title":"Characterization of SRAM sense amplifier input offset for yield prediction in 28 nm CMOS","author":"abu-rahma","year":"2011","journal-title":"Proc IEEE Custom Integr Circuits Conf (CICC)"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609437"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/81.989159"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.859510"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405677"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2268312"},{"key":"ref1","first-page":"226","article-title":"The scaling of data sensing schemes for high speed cache design in sub-\n$0.18\\,\\mu$\n\/m technologies","author":"zhang","year":"2000","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2280310"},{"key":"ref22","first-page":"242","article-title":"13.7 A reconfigurable sense amplifier with auto-zero calibration and pre-amplification in 28 nm CMOS","author":"giridhar","year":"2014","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref21","first-page":"824","article-title":"Architectural power models for sram and cam structures based on hybrid analytical\/empirical techniques","author":"liang","year":"2007","journal-title":"Proc IEEE\/ACM Int Conf Comput Aided Design"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2347707"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"557","DOI":"10.1109\/JSSC.2015.2498302","article-title":"A 28 nm 2 Mbit 6 T SRAM with highly configurable low-voltage write-ability assist implementation and capacitor-based sense-amplifier input offset compensation","volume":"51","author":"sinangil","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2018.2794827"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8741038\/08660500.pdf?arnumber=8660500","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:43:21Z","timestamp":1657745001000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8660500\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":25,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2019.2899314","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,7]]}}}