{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:51:47Z","timestamp":1759146707135,"version":"3.37.3"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology, Taiwan","doi-asserted-by":"publisher","award":["MOST 106-2221-E-155-060","MOST 107-2221-E-155-057"],"award-info":[{"award-number":["MOST 106-2221-E-155-060","MOST 107-2221-E-155-057"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/tcsi.2019.2927362","type":"journal-article","created":{"date-parts":[[2019,7,26]],"date-time":"2019-07-26T19:54:16Z","timestamp":1564170856000},"page":"4476-4489","source":"Crossref","is-referenced-by-count":8,"title":["Low-Routing-Complexity Convolutional\/Turbo Decoder Design for Iterative Detection and Decoding Receivers"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8373-2271","authenticated-orcid":false,"given":"Cheng-Hung","family":"Lin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7782-3353","authenticated-orcid":false,"given":"Ching-Wen","family":"Hsieh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2008.080206"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2010.2059730"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1049\/el:20001357"},{"key":"ref31","first-page":"217","article-title":"VLSI implementations of parallel dual-mode MAP decoding for iterative detection and decoding receiver","author":"hsieh","year":"2017","journal-title":"Proc Int Tech Conf Circuits\/Syst Comput Commun (ITC-CSCC)"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/GCCE.2015.7398524"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2363777"},{"key":"ref36","first-page":"1","article-title":"Layered detection and decoding in MIMO wireless systems","author":"preyss","year":"2012","journal-title":"Proc Conf Design Archit Signal Image Process (DASIP)"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6571967"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1002\/ett.4460080202"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"305","DOI":"10.1109\/TVLSI.2009.2032553","article-title":"Area-efficient scalable MAP processor design for high-throughput multistandard convolutional turbo decoding","volume":"19","author":"lin","year":"2011","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2046257"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-010-0521-6"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2221216"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2010.07.001"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-013-0735-5"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2309810"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2290831"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2332266"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC.2016.7593077"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.813250"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062188"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1974.1055186"},{"key":"ref3","first-page":"216","article-title":"A 335 Mb\/s 3.9 mm\n$^{2}~65$\n nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates","author":"winter","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref6","first-page":"65","article-title":"A 2.78 mm\n$^{2}~65$\n nm CMOS gigabit MIMO iterative detection and decoding receiver","author":"borlenghi","year":"2012","journal-title":"Proc Eur Solid State Circuits Conf (ESSCIRC)"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/25.901892"},{"key":"ref5","first-page":"1","article-title":"A 2.4 mm\n$^{2}~130$\n mW MMSE-nonbinary-LDPC iterative detector-decoder for \n$4\\times4\\,\\,256$\n-QAM MIMO in 65 nm CMOS","author":"chen","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"journal-title":"Technical Specification Group Radio Access Network Evolved Universal Terrestrial Radio Access (E-UTRA) Multiplexing and Channel Coding Version 10 0 0","year":"2010","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2468998"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2003.809789"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2190673"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"585","DOI":"10.1002\/ett.4460100604","article-title":"Capacity of multi-antenna Gaussian channels","volume":"10","author":"telatar","year":"1999","journal-title":"Eur Trans Telecommun"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803929"},{"key":"ref22","doi-asserted-by":"crossref","first-page":"1358","DOI":"10.1109\/TVLSI.2008.2000514","article-title":"Unified convolutional\/turbo decoder design using tile-based timing analysis of VA\/MAP kernel","volume":"16","author":"li","year":"2008","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.874375"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2382108"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2002428"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1967.1054010"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2883292"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8883027\/08777304.pdf?arnumber=8777304","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:56:09Z","timestamp":1657745769000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8777304\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":38,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2019.2927362","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2019,11]]}}}