{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T05:19:00Z","timestamp":1755926340788,"version":"3.37.3"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/tcsi.2019.2927363","type":"journal-article","created":{"date-parts":[[2019,7,23]],"date-time":"2019-07-23T20:33:27Z","timestamp":1563914007000},"page":"4186-4199","source":"Crossref","is-referenced-by-count":11,"title":["A Secure Data-Toggling SRAM for Confidential Data Protection"],"prefix":"10.1109","volume":"66","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0589-3480","authenticated-orcid":false,"given":"Weng-Geng","family":"Ho","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1512-2003","authenticated-orcid":false,"given":"Kwen-Siong","family":"Chong","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1779-1799","authenticated-orcid":false,"given":"Tony Tae-Hyoung","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Bah-Hwee","family":"Gwee","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Lyontek LY62256 32K $\\times8$ bit Low Power CMOS SRAM","year":"2019","key":"ref33"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527336"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6993-4_2"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147172"},{"key":"ref34","first-page":"320","article-title":"A dynamic-voltage-scaling 1kbyte\n$\\times8$\n-bit non-imprinting master-slave SRAM with high speed erase for low-power operation","author":"ho","year":"2014","journal-title":"Proc Int Symp Integr Circuits (ISIC)"},{"key":"ref10","first-page":"1","article-title":"Lest we remember: Cold-boot attacks on encryption keys","author":"halderman","year":"2008","journal-title":"Proc 17th USENIX Security Symp"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ARES.2013.52"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2018.00102"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405689"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000670"},{"article-title":"Non-imprinting memory with high speed erase","year":"2009","author":"backus","key":"ref15"},{"article-title":"Systems and methods for preventing data remanence in memory systems","year":"2012","author":"pedersen","key":"ref16"},{"key":"ref17","article-title":"Security strategy of powered-off SRAM for resisting physical attack to data remanence","volume":"30","author":"yu","year":"2009","journal-title":"Semiconductors"},{"article-title":"High-assurance processor active memory content protection","year":"2006","author":"furusawa","key":"ref18"},{"article-title":"System and method of detecting and reversing data imprinting in memory","year":"2013","author":"trimberger","key":"ref19"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2004.03.019"},{"key":"ref4","first-page":"1","article-title":"Data remanence in semiconductor devices","volume":"10","author":"gutmann","year":"2001","journal-title":"Proc 10th Usenix Security Symp"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2096112"},{"key":"ref3","first-page":"320","article-title":"Novel security strategies for SRAM in powered-off state to resist physical attack","author":"kang","year":"2009","journal-title":"Proc Int Symp Integr Circuits (ISIC)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2012.6330672"},{"journal-title":"Predictive technology model Nanoscale Integration and Modeling Group","year":"2006","key":"ref29"},{"article-title":"Low temperature data remanence in static RAM","year":"2002","author":"skorobogatov","key":"ref5"},{"key":"ref8","first-page":"219","article-title":"The temperature side channel and heating fault attacks","author":"hutter","year":"2013","journal-title":"Proc CARDIS"},{"key":"ref7","first-page":"45","article-title":"Lest we remember: Cold-boot attacks on encryption keys","author":"halderman","year":"2008","journal-title":"Proc Usenix Secur Symp"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.203"},{"key":"ref9","first-page":"65","article-title":"On a new way to read data from memory","author":"samyde","year":"2002","journal-title":"Proc IEEE SIS"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2497558"},{"article-title":"Protection of secure electronic modules against attacks","year":"2011","author":"buscaglia","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2013.6575315"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059010"},{"journal-title":"ARM Artisan Memory Compilers","year":"2019","key":"ref24"},{"key":"ref23","first-page":"546","article-title":"Low power aging-aware register file design by duty cycle balancing","author":"wang","year":"2012","journal-title":"Proc DATE"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-0818-5"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2167264"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/8883027\/08770278.pdf?arnumber=8770278","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:56:09Z","timestamp":1657745769000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8770278\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":34,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2019.2927363","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"type":"print","value":"1549-8328"},{"type":"electronic","value":"1558-0806"}],"subject":[],"published":{"date-parts":[[2019,11]]}}}