{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T18:02:24Z","timestamp":1777658544703,"version":"3.51.4"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,1]]},"DOI":"10.1109\/tcsi.2020.3033202","type":"journal-article","created":{"date-parts":[[2020,10,30]],"date-time":"2020-10-30T20:21:37Z","timestamp":1604089297000},"page":"469-482","source":"Crossref","is-referenced-by-count":13,"title":["The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5878-706X","authenticated-orcid":false,"given":"Marijn","family":"Verbeke","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1817-5370","authenticated-orcid":false,"given":"Guy","family":"Torfs","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3731-9731","authenticated-orcid":false,"given":"Pieter","family":"Rombouts","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2415174"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2220502"},{"key":"ref31","author":"gelb","year":"1968","journal-title":"Multiple-Input Describing Functions and Nonlinear System Design"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2755690"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2019.2938677"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/EDSSC.2017.8126514"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/SOC.2003.1241531"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818572"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ASICON.2017.8252531"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2003.1206313"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.905536"},{"key":"ref17","first-page":"110","article-title":"6.1 A 56Gb\/s PAM-4\/NRZ transceiver in 40 nm CMOS","author":"peng","year":"2017","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref18","first-page":"219","article-title":"A dual-28Gb\/s digital-assisted distributed driver with CDR for optical-DAC PAM4 modulation in 40 nm CMOS","author":"liao","year":"2019","journal-title":"Proc IEEE Radio Freq Integr Circuits Symp (RFIC)"},{"key":"ref19","first-page":"1","article-title":"A 50 Gb\/s-PAM4 CDR with on-chip eye opening monitor for reference-level and clock-sampling adaptation","author":"chang","year":"2018","journal-title":"Proc Opt Fiber Commun Conf"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.808282"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778159"},{"key":"ref27","first-page":"67","article-title":"Analysis of timing recovery for multi-Gbps PAM transceivers","author":"ken yang","year":"2003","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2939342"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2881278"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1049\/el:19750415"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/EDSSC.2019.8754128"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.879094"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICTA.2018.8706109"},{"key":"ref2","first-page":"1606","article-title":"Design of a sample-and-hold analog front end for a 56Gb\/s PAM-4 receiver using 65 nm CMOS","author":"sadeghipour","year":"2015","journal-title":"Proc IEEE Int Symp Circuits Syst (ISCAS)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4.841504"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2433269"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2967560"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2855692"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870898"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOM.2003.1258933"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2873602"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050226"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.842863"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9316996\/09245566.pdf?arnumber=9245566","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:03:38Z","timestamp":1642003418000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9245566\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,1]]},"references-count":33,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2020.3033202","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,1]]}}}