{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T04:53:20Z","timestamp":1780635200133,"version":"3.54.1"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2021,3,1]],"date-time":"2021-03-01T00:00:00Z","timestamp":1614556800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,3,1]],"date-time":"2021-03-01T00:00:00Z","timestamp":1614556800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,3,1]],"date-time":"2021-03-01T00:00:00Z","timestamp":1614556800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61971024"],"award-info":[{"award-number":["61971024"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["51901008"],"award-info":[{"award-number":["51901008"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"International Mobility Project","award":["B16001"],"award-info":[{"award-number":["B16001"]}]},{"name":"National Key Technology Program of China","award":["2017ZX01032101"],"award-info":[{"award-number":["2017ZX01032101"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,3]]},"DOI":"10.1109\/tcsi.2021.3055830","type":"journal-article","created":{"date-parts":[[2021,2,3]],"date-time":"2021-02-03T22:05:44Z","timestamp":1612389944000},"page":"1193-1205","source":"Crossref","is-referenced-by-count":67,"title":["Time-Domain Computing in Memory Using Spintronics for Energy-Efficient Convolutional Neural Network"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6893-7199","authenticated-orcid":false,"given":"Yue","family":"Zhang","sequence":"first","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jinkai","family":"Wang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chenyu","family":"Lian","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yining","family":"Bai","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Guanda","family":"Wang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhizhong","family":"Zhang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhenyi","family":"Zheng","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lei","family":"Chen","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kun","family":"Zhang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8240-484X","authenticated-orcid":false,"given":"Georgios","family":"Sirakoulis","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Youguang","family":"Zhang","sequence":"additional","affiliation":[{"name":"MIIT Key Laboratory of Spintronics, School of Integrated Circuit Science and Engineering, Fert Beijing Institute, Beihang University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","first-page":"1","article-title":"Deep compression: Compressing deep neural networks with pruning, trained quantization and Huffman coding","author":"han","year":"2016","journal-title":"Proc ICLR"},{"key":"ref38","first-page":"1","article-title":"Trained ternary quantization","author":"zhu","year":"2017","journal-title":"Proc ICLR"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1117\/12.325716"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2423751"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/48\/6\/065001"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0160-7"},{"key":"ref37","first-page":"525","article-title":"XNOR-Net: ImageNet classification using binary convolutional neural networks","author":"rastegari","year":"2016","journal-title":"Proc Eur Conf Comput Vis (ECCV)"},{"key":"ref36","first-page":"4114","article-title":"Binarized neural networks","author":"hubara","year":"2016","journal-title":"Proc NIPS"},{"key":"ref35","first-page":"622","article-title":"NeuralPower: Predict and deploy energy-efficient convolutional neural networks","author":"cai","year":"2017","journal-title":"Proc ACML"},{"key":"ref34","first-page":"10","article-title":"Computing’s energy problem (and what we can do about it)","author":"horowitz","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3005754"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662435"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2939682"},{"key":"ref13","article-title":"Bit parallel 6T SRAM in-memory computing with reconfigurable bit-precision","author":"lee","year":"2020","journal-title":"Proc 57th ACM\/IEEE Design Automat Conf (DAC)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2992886"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2952773"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2880918"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2434872"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2019.2906932"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2019.2907063"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3020137"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/nature14539"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2971642"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"484","DOI":"10.1038\/nature16961","article-title":"Mastering the Game of Go with deep neural networks and tree search","volume":"529","author":"silver","year":"2016","journal-title":"Nature"},{"key":"ref6","first-page":"1135","article-title":"Learning both weights and connections for efficient neural networks","author":"han","year":"2015","journal-title":"Proc NIPS"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1088\/1674-1056\/ab9439"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2017.2774288"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2767204"},{"key":"ref2","first-page":"1097","article-title":"ImageNet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc Adv Neural Inf Process Syst (NIPS)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2774291"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2018.2829522"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2939888"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2762431"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref22","article-title":"Enhanced spin-orbit torque and multilevel current-induced switching in W\/Co-Tb\/Pt heterostructure","volume":"12","author":"zheng","year":"2019","journal-title":"Phys Rev A Gen Phys"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184470"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2866932"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2828611"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2858251"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.2013.6738831"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2776954"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2750207"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1109\/82.996055","article-title":"Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates","volume":"49","author":"bui","year":"2002","journal-title":"IEEE Trans Circuits Syst II Analog Digit Signal Process"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2960028"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2820999"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9352589\/09345759.pdf?arnumber=9345759","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T17:54:33Z","timestamp":1751910873000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9345759\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,3]]},"references-count":47,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2021.3055830","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,3]]}}}