{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T15:32:59Z","timestamp":1772206379242,"version":"3.50.1"},"reference-count":35,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62071424"],"award-info":[{"award-number":["62071424"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62027805"],"award-info":[{"award-number":["62027805"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Zhejiang Laboratory Foundation of China","award":["2020KCDAB01"],"award-info":[{"award-number":["2020KCDAB01"]}]},{"DOI":"10.13039\/501100004731","name":"Zhejiang Provincial Natural Science Foundation of China","doi-asserted-by":"publisher","award":["LD21F010002"],"award-info":[{"award-number":["LD21F010002"]}],"id":[{"id":"10.13039\/501100004731","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004835","name":"Zhejiang University Academic Award for Outstanding Doctoral Candidates","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004835","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Circuits Syst. I"],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/tcsi.2021.3060798","type":"journal-article","created":{"date-parts":[[2021,3,4]],"date-time":"2021-03-04T20:43:31Z","timestamp":1614890611000},"page":"1906-1916","source":"Crossref","is-referenced-by-count":30,"title":["Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme"],"prefix":"10.1109","volume":"68","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0933-7374","authenticated-orcid":false,"given":"Tuomin","family":"Tao","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7914-9323","authenticated-orcid":false,"given":"Hanzhi","family":"Ma","sequence":"additional","affiliation":[]},{"given":"Quankun","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Zhe-Ming","family":"Gu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9744-1982","authenticated-orcid":false,"given":"Hang","family":"Jin","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1734-7241","authenticated-orcid":false,"given":"Manareldeen","family":"Ahmed","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7331-3484","authenticated-orcid":false,"given":"Shurun","family":"Tan","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1019-4019","authenticated-orcid":false,"given":"Aili","family":"Wang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6357-7574","authenticated-orcid":false,"given":"En-Xiao","family":"Liu","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5006-7399","authenticated-orcid":false,"given":"Er-Ping","family":"Li","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","year":"2019","journal-title":"Ansys\ufffd Q3D Extractor"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1002\/9781119078388.app4"},{"key":"ref31","first-page":"102t","article-title":"Reliability significant improvement of resistive switching memory by dynamic self-adaptive write method","author":"song","year":"2013","journal-title":"Proc Symp VLSI Technol"},{"key":"ref30","first-page":"42","article-title":"A 0.13 ${\\mu}\\text{m}$\n 8 Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction","author":"xue","year":"2012","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref35","year":"2019","journal-title":"ANSYS High Frequency Structure Simulator"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1002\/9781119078388.app3"},{"key":"ref10","first-page":"500","article-title":"A fully integrated analog ReRAM based 78.4 TOPS\/W compute-in-memory chip with fully parallel MAC computing","author":"liu","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref11","first-page":"244","article-title":"A 22 nm 2 Mb ReRAM compute-in-memory macro with 121–28 TOPS\/W for multibit MAC computing for tiny AI edge devices","author":"xue","year":"2020","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.2200\/S00681ED1V01Y201510EET006"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2304653"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2729787"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2866510"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms15199"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-020-1942-4"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2013.2250995"},{"key":"ref28","year":"2017","journal-title":"Matlab"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2911898"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1126\/science.1254642"},{"key":"ref6","first-page":"494","article-title":"A 65 nm 1 Mb nonvolatile computing-in-memory ReRAM macro with sub-16 ns multiply-and-accumulate for binary DNN AI edge processors","author":"chen","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref29","first-page":"28.2.1","article-title":"A 16 Mb dual-mode ReRAM macro with sub-14 ns computing-in-memory and memory functions enabled by self-write termination scheme","author":"chen","year":"2017","journal-title":"IEDM Tech Dig"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-019-1424-8"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662395"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510676"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/2.330035"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0288-0"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"436","DOI":"10.1038\/nature14539","article-title":"Deep learning","volume":"521","author":"lecun","year":"2015","journal-title":"Nature"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/NAECON.2014.7045810"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2017.2784364"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2017.05.005"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2019.2917910"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2714101"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.2975314"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1063\/1.4885419"}],"container-title":["IEEE Transactions on Circuits and Systems I: Regular Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8919\/9408528\/09369873.pdf?arnumber=9369873","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T11:32:16Z","timestamp":1643196736000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9369873\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":35,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcsi.2021.3060798","relation":{},"ISSN":["1549-8328","1558-0806"],"issn-type":[{"value":"1549-8328","type":"print"},{"value":"1558-0806","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,5]]}}}